Mario1159/verilator
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a494ad5ec7
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1565 Commits

Author SHA1 Message Date
Wilson Snyder
a494ad5ec7 Support $ferror, #1638. 2020-04-05 11:22:05 -04:00
Wilson Snyder
e55338f927 Support $fflush without arguments, #1638. 2020-04-05 10:11:28 -04:00
Wilson Snyder
6eadb8e771 Add simplistic class support with many restrictions, see manual, #377. 2020-04-05 09:30:23 -04:00
Wilson Snyder
bf17bb4648 Fix codacity warnings 2020-04-04 20:08:58 -04:00
Wilson Snyder
c288a7bfb9 Add GCC10-style line number prefix when showing source text for errors. 2020-04-03 20:07:46 -04:00
Marco Widmer
7f9aa057bf
Support split_var in vit files (#2219) 2020-04-03 08:08:23 -04:00
Wilson Snyder
dcde026bac With --Wpedantic, report forward typedefs that are unused. 2020-04-02 07:39:14 -04:00
Wilson Snyder
926209706f Report REALCVT on $display format mistakes. 2020-04-01 20:42:47 -04:00
Wilson Snyder
19abce5535 Suppress REALCVT for whole real numbers. 2020-04-01 18:43:53 -04:00
Wilson Snyder
e6beab4037 Fix implicit conversion of floats to wide integers. 2020-03-31 20:42:07 -04:00
Wilson Snyder
ebeb645539 Commentary 2020-03-30 20:09:55 -04:00
Wilson Snyder
5c72f01598 Fix assertions with unique case inside, #2199. 2020-03-30 18:13:51 -04:00
Matthew Ballance
510be53521
Expose VPI cbNextDeadline via the public API (#2212) 
Signed-off-by: Matthew Ballance <matt.ballance@gmail.com>
 2020-03-28 13:47:21 -04:00
Wilson Snyder
4145a38c47 Fix duplicate typedefs in generate for, #2205. 2020-03-26 18:10:20 -04:00
Wilson Snyder
590b1853d0 Fix packages as enum base types, #2202. 2020-03-24 17:57:12 -04:00
Wilson Snyder
1e0e51edd3 Fix parameter type redeclaring a type, #2195. 2020-03-21 12:13:55 -04:00
Wilson Snyder
0ca07e4d58 Tests: Remove t_emit_memb_limit/vltmt as slow 2020-03-21 12:08:38 -04:00
Wilson Snyder
1ce360ed5b Add SPDX license identifiers. No functional change. 2020-03-21 11:24:24 -04:00
Wilson Snyder
5f63b24c50 Change --quiet-exit to also suppress 'Exiting due to N errors'. 2020-03-15 08:09:51 -04:00
Wilson Snyder
81c659957e Add column numbers to errors and warnings. 2020-03-14 22:02:42 -04:00
Wilson Snyder
ee8dd32c04 Check and document error format, #2191. 2020-03-14 21:48:26 -04:00
Wilson Snyder
0a755e6ecf Tests: Favor use of expect_filename. No functional change. 2020-03-14 17:42:15 -04:00
Wilson Snyder
e6c91f59ab Tests: Allow --numsets 2/2 2020-03-09 17:57:27 -04:00
Wilson Snyder
135ccf6595 Tests: Fix ormux on travis. 2020-03-08 09:48:13 -04:00
Wilson Snyder
9a2a3f8db7 Tests: Add t_gate_ormux, #2186, #2187. 2020-03-08 09:18:12 -04:00
Wilson Snyder
8ccc17f30b Add setting VM_PARALLEL_BUILDS=1 when using --output-split, #2185. 2020-03-08 09:03:29 -04:00
Wilson Snyder
328fef8190 Tests: Add driver --hashset for Travis. 2020-03-07 21:38:44 -05:00
Wilson Snyder
6c6d70a5e5 Fix FST when multi-model tracing. 2020-03-07 18:39:58 -05:00
Wilson Snyder
6f49f802b1 Tests: Add fst_identical. 2020-03-07 16:59:46 -05:00
Wilson Snyder
e70cba77e6 Add support for dynamic arrays, #379. 2020-03-07 10:24:27 -05:00
Wilson Snyder
135cbcd79a Internals: Move 'new' unsupported forward from parse into Ast. 2020-03-05 22:33:31 -05:00
Wilson Snyder
75ecad591a Implement $displayb/o/h, $writeb/o/h, etc, Closes #1637. 2020-03-05 21:49:25 -05:00
Wilson Snyder
dab1cb610a Tests: Allow iv to run SystemVerilog tests 2020-03-05 18:12:10 -05:00
Wilson Snyder
30a33a6104 Add support for and , #2126. 2020-03-01 21:39:23 -05:00
Wilson Snyder
0ca0e07354 Internals: Vcd doesn't need code when registering. No functional change intended. 2020-02-29 20:42:52 -05:00
Wilson Snyder
aac02acf92 Tests: Rename 2020-02-29 10:06:52 -05:00
Wilson Snyder
082c9e0b1d Tests: Add two-design trace tests. 2020-02-29 09:44:51 -05:00
Wilson Snyder
a7bd934fe3 Tests: Cleanup false used as 0. No functional change. 2020-02-29 08:56:49 -05:00
David Stanford
e98a380b44
Tests: Update some tests to skip if prerequisites aren't installed (#2181) 2020-02-29 07:20:23 -05:00
Wilson Snyder
4878fe3a1f Add split_var metacomment to assist UNOPTFLAT fixes, #2066. 2020-02-28 19:15:08 -05:00
Wilson Snyder
991d81cd0a Recommend -Os. 2020-02-27 07:46:34 -05:00
Wilson Snyder
68b6a0b667 Fix genblk naming with directly nested generate blocks, #2176. 2020-02-25 22:21:16 -05:00
Wilson Snyder
93ac79981b Tests: Rename t_var_dotted. No functional change. 2020-02-24 18:51:44 -05:00
Todd Strader
60f82961b4 De-tabify 2020-02-24 06:36:13 -05:00
Todd Strader
f7d1c6ca72 emacs verilog-batch-indent 2020-02-24 06:36:13 -05:00
Todd Strader
4b4f10f5e6 Follow other clock gating examples 2020-02-24 06:36:13 -05:00
Todd Strader
120f62fe85 Fix is probably to mark as a clock 2020-02-24 06:36:13 -05:00
Todd Strader
db6ecbd57e Test for #2169 2020-02-24 06:36:13 -05:00
Wilson Snyder
28e19cef90 Fix undeclared VL_SHIFTR_WWQ, #2114. 2020-02-23 19:33:37 -05:00
Tobias Wölfel
18f8cd0529
Allow assert disable (#2168) 
* Add +verilator+noassert flag

This allows to disable the assert check per simulation argument.

* Add AssertOn check for assert

Insert the check AssertOn to allow disabling of asserts.
Asserts can be disabled by not using the `--assert` flag or by calling
`AssertOn(false)`, or passing the "+verilator+noassert" runtime flag.
Add tests for this behavior.
Bad tests check that the assert still causes a stop.
Non bad tests check that asserts are properly disabled and cause no stop
of the simulation.

Fixes #2162.

Signed-off-by: Tobias Wölfel <tobias.woelfel@mailbox.org>

* Correct file location

Signed-off-by: Tobias Wölfel <tobias.woelfel@mailbox.org>

* Add description for single test execution

Without this description it is not obvious how to run a single test from
the regression test suite.

Signed-off-by: Tobias Wölfel <tobias.woelfel@mailbox.org>
 2020-02-15 18:17:23 -06:00