forked from github/verilator
Suppress REALCVT for whole real numbers.
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@ -11,6 +11,8 @@ The contributors that suggested a given feature are shown in []. Thanks!
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*** Change --quiet-exit to also suppress 'Exiting due to N errors'.
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**** Suppress REALCVT for whole real numbers.
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**** Fix parameter type redeclaring a type, #2195. [hdzhangdoc]
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**** Fix VCD open with empty filename, #2198. [Julius Baxter]
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@ -4338,9 +4338,16 @@ private:
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// IEEE-2012 11.8.1: Signed: Type coercion creates signed
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// 11.8.2: Argument to convert is self-determined
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if (nodep && nodep->dtypep()->skipRefp()->isDouble()) {
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UINFO(6," spliceCvtS: "<<nodep<<endl);
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UINFO(6, " spliceCvtS: " << nodep << endl);
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AstNRelinker linker;
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nodep->unlinkFrBack(&linker);
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if (AstConst* constp = VN_CAST(nodep, Const)) {
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// Ignore obvious conversions of whole real numbers, e.g. 1.0 -> 1
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if (constp->isDouble()
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&& constp->num().toDouble() == floor(constp->num().toDouble())) {
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warnOn = false;
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}
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}
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if (warnOn) nodep->v3warn(REALCVT, "Implicit conversion of real to integer");
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AstNode* newp = new AstRToIRoundS(nodep->fileline(), nodep);
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linker.relink(newp);
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@ -8,5 +8,6 @@ module sub;
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integer i;
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initial begin
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i = 23.2;
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i = 23.0; // No warning - often happens with units of time
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end
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endmodule
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