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936738b750
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101 Commits

Author SHA1 Message Date
Wilson Snyder
936738b750 Add /*verilator public_flat_rw*/ for timing-specific public access. 2010-04-05 20:01:17 -04:00
Wilson Snyder
f1b6c0c559 Support "`default_nettype none|wire". 2010-02-23 09:27:16 -05:00
Wilson Snyder
e39eddf3fe Fix parametrized defines with empty arguments. 2010-02-21 07:20:39 -05:00
Wilson Snyder
cdd06e7236 Support "break", "continue", "return". 2010-02-14 10:01:21 -05:00
Wilson Snyder
d17bcd8afe Allow 'global' reserved identifier in 1800-2009 when possible 2010-01-22 19:08:20 -05:00
Wilson Snyder
58efab5cdf Add SystemVerilog 1800-2009 keywords 2010-01-21 21:58:45 -05:00
Wilson Snyder
c695af31b8 Add experimental config files to filter warnings outside of the source. 2010-01-21 06:11:30 -05:00
Wilson Snyder
72b596efb3 DPI $display like sformat metacomment and $sformatf 2010-01-17 19:13:44 -05:00
Wilson Snyder
a2629c4929 Internals: Avoid some extra CRELINES 2010-01-09 15:44:06 -05:00
Wilson Snyder
a94f5ba200 --bbox-unsup now ignores cmos and tran gate primitives 2010-01-07 22:08:48 -05:00
Wilson Snyder
729dfdfed7 Copyright year update 2010-01-05 21:15:06 -05:00
Wilson Snyder
f3347be629 Support edge, 1800-2009 2009-12-28 19:49:40 -05:00
Wilson Snyder
dbce06500d Support enums 2009-12-27 08:29:55 -05:00
Wilson Snyder
5a9309de78 DPI import: Allow system calls to call imports 2009-12-04 07:05:44 -05:00
Wilson Snyder
a40fae04ce Support direct programming interface (DPI) "import". 2009-12-03 06:55:29 -05:00
Wilson Snyder
d2a27a84cf Support chandle 2009-11-24 09:11:25 -05:00
Wilson Snyder
c7d8eb126f Support and . 2009-11-23 21:24:55 -05:00
Wilson Snyder
d7a2362a76 Parse UDP Tables, and report single unsupported error 2009-11-20 19:53:40 -05:00
Wilson Snyder
e479c8a553 Support 'primitive', but not yet 'table'. 2009-11-20 08:41:28 -05:00
Wilson Snyder
62f707f501 Support $test$plusargs and $value$plusargs, but see the docs. 2009-11-19 17:04:21 -05:00
Wilson Snyder
19d62b7a68 Support 'time'. 2009-11-19 10:45:59 -05:00
Wilson Snyder
3b39c3391d Support "import". 2009-11-09 19:07:59 -05:00
Wilson Snyder
68567e763c Support "package" and $unit. 
Add VARHIDDEN warning when signal name hides module name.
 2009-11-07 21:05:02 -05:00
Wilson Snyder
377f194837 Support typedef 2009-11-06 23:16:06 -05:00
Wilson Snyder
b1ce6bd5cc Support "var" 2009-11-05 19:57:31 -05:00
Wilson Snyder
0d65f08b1d Support "program". 2009-11-05 19:09:45 -05:00
Wilson Snyder
f59467b897 Support void functions. 
Fix "int" etc added in wrong keyword section in last commit.
 2009-11-02 22:50:31 -05:00
Wilson Snyder
6bc81d3d26 Support byte, shortint, int, longint in variables, parameters and functions. 
Internals: function/var sizing and signing now comes via dtypep()
Internals: cleanup code that widths parameters (again)
 2009-11-02 22:14:11 -05:00
Wilson Snyder
9a133ced2d Support 'bit' keyword 2009-10-31 15:12:28 -04:00
Wilson Snyder
f7efae93d5 Internals: Clean up the main flex/bison files to have some sanity. 
(Hopefully) no functional change.
	. V3Parse.h		External consumer interface to V3ParseImp
	. V3ParseImp		Internals to parser, common to across flex & bison
	... V3ParseGrammar	Wrapper that includes V3ParseBison
	..... V3ParseBison	Bison output
	... V3ParseLex		Wrapper that includes lex output
	..... V3Lexer.yy.cpp	Flex output
 2009-10-31 10:08:38 -04:00
Wilson Snyder
7b4d2118ea Internals: Realign flex with Verilog-Perl version 2009-10-30 23:17:56 -04:00
Wilson Snyder
e14695c96e Fix erroring on strings with backslashed newlines, bug168. 2009-10-22 21:46:49 -04:00
Wilson Snyder
996afe7d95 Cleanup handling DOS CRs to match preprocessor 
Fix missing line number increment for `pragma
 2009-10-22 16:51:34 -04:00
Wilson Snyder
faa5ef193b Add --bbox-sys option to blackbox $system calls. 2009-09-16 09:28:09 -04:00
Wilson Snyder
4dde1ede0e Support SystemVerilog "logic", bug101. 2009-07-16 09:19:15 -04:00
Wilson Snyder
4569278c53 Reconsile parser with Verilog-Perl version, to enable more SV features 2009-05-07 18:28:05 -04:00
Wilson Snyder
851b022c7a Change lexer to more closely match Verilog-Perl. Should be no functional change 2009-05-05 13:39:25 -04:00
Wilson Snyder
0985f675e3 Update bisonpre to match Verilog-Perl version 2009-05-04 21:54:44 -04:00
Wilson Snyder
7df730cedd Verilator is now licensed under LGPL v3 and/or Artistic v2.0. 2009-05-04 17:07:57 -04:00
Wilson Snyder
d60d0a60c7 Support repeat and forever statements. 2009-02-25 22:06:59 -05:00
Wilson Snyder
12bd12e112 Support bufif0, bufif1, notif0, notif1 2009-01-06 11:57:25 -05:00
Lane Brooks
0e4f9170fa Tristate support; merge from branch. 2009-01-06 11:03:57 -05:00
Wilson Snyder
3d06720628 Copyright year update 2009-01-02 11:47:39 -05:00
Wilson Snyder
6b46da0240 Create /*verilator coverage_on/off*/ instead of coverage_module_off. 
This allows finer grained bracketing of sections of interest.
Convert tracing_on/off to use the same general scheme.
 2008-12-11 16:01:41 -05:00
Wilson Snyder
0fed1d34d1 Add /*verilator coverage_module_off*/ 2008-12-10 17:10:03 -05:00
Wilson Snyder
384807ebbd Ignore SystemVerilog timeunit and timeprecision 2008-10-14 14:49:54 -04:00
Wilson Snyder
a348bd3458 Add unique and parallel case 2008-10-10 19:02:27 -04:00
Wilson Snyder
22543f3e19 Support arbitrary characters in identifiers and tracing. 2008-09-17 22:22:46 -04:00
Wilson Snyder
500dc2170f Support SystemVerilog "cover property" statements. 2008-08-06 12:52:39 -04:00
Wilson Snyder
8a7864ebaa Add --Wfuture-, for improving forward compatibility. 2008-07-22 14:27:34 -04:00