Commit Graph

1344 Commits

Author SHA1 Message Date
Wilson Snyder
de4016dcff Internals: Ast classes create declRange(). 2013-01-17 20:41:45 -05:00
Wilson Snyder
bbeb382cbb Internals: Rename range lo/hi to match IEEE. 2013-01-17 20:29:20 -05:00
Wilson Snyder
385c166830 Fix package logic var compile error. 2013-01-17 19:04:36 -05:00
Wilson Snyder
410e6ff203 Fix DECLFILENAME warning on . 2013-01-17 18:38:51 -05:00
Jeremy Bennett
8b47c4e307 Fix loosing logic/bit difference and -x-initial-edge fallout, bug604.
Signed-off-by: Wilson Snyder <wsnyder@wsnyder.org>
2013-01-17 07:16:19 -05:00
Wilson Snyder
6d1b42bedb Fix implicit one bit parameter selection, bug603. 2013-01-16 20:58:48 -05:00
Wilson Snyder
f0a4bd28b6 Comment about -x-initial-edge and logic/bit. 2013-01-16 20:47:22 -05:00
Wilson Snyder
2879684f21 Define SYSTEMVERILOG, SV_COV_START and other IEEE mandated predefines. 2013-01-16 19:11:56 -05:00
Wilson Snyder
0437d0abea Fix pin width mismatch error, bug595. 2013-01-15 19:26:35 -05:00
Wilson Snyder
0286f588bf Tests: bind by modname 2013-01-15 19:23:46 -05:00
Wilson Snyder
042fb76837 Tests 2013-01-14 23:39:56 -05:00
Wilson Snyder
795e66eac9 Support bind, to module names only, bug602. 2013-01-14 23:19:44 -05:00
Wilson Snyder
aae0615ffd Commentary 2013-01-14 21:51:02 -05:00
Wilson Snyder
8127a79cb1 Fix nested packed arrays and structs, bug600.
IMPORTANT: Packed arrays are now represented as a single linear vector in
Verilated models this may affect packed arrays that are public or accessed via the VPI.
2013-01-14 21:49:22 -05:00
Wilson Snyder
057ca497dd tests: Fix Xs on vector data 2013-01-14 21:38:16 -05:00
Wilson Snyder
66b1611649 In debug, show node dump after errors. 2013-01-14 21:37:55 -05:00
Wilson Snyder
7f5220a6ca Internals: Fix marking of packed vs unpacked wires. 2013-01-13 22:18:57 -05:00
Wilson Snyder
e41e26717b Commentary 2013-01-13 19:51:15 -05:00
Wilson Snyder
7a8184d206 Internals: Remove dimension and use only dtypes for V3Width. 2013-01-13 15:21:38 -05:00
Wilson Snyder
13bf2f19ac Internals: Have V3Unknown/Const use only dtypes for selects. 2013-01-13 14:54:12 -05:00
Wilson Snyder
1d5ebfd0b1 Internals: Have V3WidthSel use only dtypes for select promotion. 2013-01-13 14:49:53 -05:00
Wilson Snyder
dfc11da2ce Internals: Dump array bounds in tree file. 2013-01-13 14:30:56 -05:00
Wilson Snyder
191af2e87b Internals: Make SelPlus consistent with other branches. No functional change intended. 2013-01-13 11:30:05 -05:00
Wilson Snyder
0985b82760 Commentary 2013-01-13 09:48:12 -05:00
Wilson Snyder
26f4b5a69a Stats: Count only unpacked 2013-01-12 16:26:26 -05:00
Wilson Snyder
5c7a6e278f Internals: Split into packed and unpacked array types 2013-01-12 16:19:25 -05:00
Wilson Snyder
ae1ab8aaaa Fix array slice selection of msb==lsb. 2013-01-12 15:34:09 -05:00
Wilson Snyder
18c25d1b6f Commentary 2013-01-12 14:51:16 -05:00
Wilson Snyder
5888a2c399 Internals: Move V3WidthSel::range into V3Width. No functional change intended. 2013-01-12 14:23:56 -05:00
Wilson Snyder
c00603704e Commentary 2013-01-11 07:05:25 -05:00
Wilson Snyder
786bc4b04f devel release 2013-01-09 22:27:36 -05:00
Wilson Snyder
5eca20f849 Version bump 2013-01-09 22:08:30 -05:00
Wilson Snyder
0a3a582949 Fix array extraction of implicit vars, bug601. 2013-01-09 19:00:12 -05:00
Wilson Snyder
08fec0534d Fix package import preventing local var, bug599. 2013-01-08 19:06:52 -05:00
Wilson Snyder
5bf92c9d3a Fix task inlining under case values, bug598. Note this reorders high level operations, so may change loose some optimizations. 2013-01-02 18:35:21 -05:00
Wilson Snyder
a8bbf7231b Copyright year update. 2013-01-01 09:42:59 -05:00
Wilson Snyder
83c171012d Test added 2012-12-31 19:06:49 -05:00
Wilson Snyder
229d854607 Fix package resolution of parameters, bug586. 2012-12-31 17:05:13 -05:00
Wilson Snyder
562460606f Internals: Add V3LinkDot m_ds structure, towards bug586. No functional change. 2012-12-31 14:00:04 -05:00
Wilson Snyder
46f70b1cbb Fix implying dotted wire names 2012-12-31 13:50:44 -05:00
Wilson Snyder
a547133efe Internals: Remove VAR_MEM to match Verilog-Perl, towards bug586. 2012-12-31 13:47:34 -05:00
Wilson Snyder
cf445898ce Internals: Move VARRESET rule to match Verilog-Perl and prevent next change conflict, towards bug586. No functional change. 2012-12-31 13:43:54 -05:00
Wilson Snyder
98f68e46d6 Fix package import of package imports, partial bug592. 2012-12-17 20:26:40 -05:00
Wilson Snyder
27660b271d Fix package import of non-localparam parameter, bug591. 2012-12-17 19:07:23 -05:00
Wilson Snyder
895e374860 Test for last commit. 2012-12-17 18:41:54 -05:00
Wilson Snyder
4c7f051247 Fix task inlining under , bug589. 2012-12-15 21:41:37 -05:00
Wilson Snyder
e68afa53a8 Fix non-integer vpi_get_value, bug587. 2012-12-06 09:40:16 -05:00
Wilson Snyder
cc47ba2404 Support "unsigned int" DPI import functions, msg966. 2012-12-03 20:43:13 -05:00
Wilson Snyder
2238fa46ed Show fileline in bison debug. 2012-12-02 18:03:34 -05:00
Wilson Snyder
de8b040e31 bisonpre: Add colon to states for searching 2012-12-02 16:19:31 -05:00