forked from github/verilator
Fix package import of non-localparam parameter, bug591.
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@ -11,6 +11,8 @@ indicates the contributor was also the author of the fix; Thanks!
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**** Fix task inlining under $display, bug589. [Holger Waechtler]
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**** Fix package import of non-localparam parameter, bug591. [Jeremy Bennett]
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* Verilator 3.843 2012/12/01
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@ -247,7 +247,7 @@ public:
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abovep->reinsert(name, symp);
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return symp;
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}
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void insertSym(VSymEnt* abovep, const string& name, AstNode* nodep, AstPackage* packagep) {
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VSymEnt* insertSym(VSymEnt* abovep, const string& name, AstNode* nodep, AstPackage* packagep) {
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if (!abovep) nodep->v3fatalSrc("Null symbol table inserting node");
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VSymEnt* symp = new VSymEnt(&m_syms, nodep);
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UINFO(9," INSERTsym se"<<(void*)symp<<" name='"<<name<<"' above=se"<<(void*)abovep<<" node="<<nodep<<endl);
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@ -258,6 +258,7 @@ public:
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nodep->user1p(symp);
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checkDuplicate(abovep, nodep, name);
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abovep->insert(name, symp);
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return symp;
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}
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static bool existsModScope(AstNodeModule* nodep) {
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return nodep->user1p()!=NULL;
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@ -698,7 +699,8 @@ private:
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m_statep->insertSym(m_curSymp, nodep->name(), nodep, m_packagep);
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if (m_statep->forPrimary() && nodep->isGParam()) {
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m_paramNum++;
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m_statep->insertSym(m_curSymp, "__paramNumber"+cvtToStr(m_paramNum), nodep, m_packagep);
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VSymEnt* symp = m_statep->insertSym(m_curSymp, "__paramNumber"+cvtToStr(m_paramNum), nodep, m_packagep);
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symp->importable(false);
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}
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}
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}
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@ -752,6 +754,7 @@ private:
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}
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}
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m_curSymp->import(srcp, nodep->name());
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UINFO(2," Link Done: "<<nodep<<endl);
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// No longer needed, but can't delete until any multi-instantiated modules are expanded
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}
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@ -876,7 +879,9 @@ private:
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nodep->v3error("Pin is not an in/out/inout: "<<nodep->prettyName());
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} else {
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refp->user4(true);
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m_statep->insertSym(m_statep->getNodeSym(m_modp), "__pinNumber"+cvtToStr(nodep->pinNum()), refp, NULL/*packagep*/);
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VSymEnt* symp = m_statep->insertSym(m_statep->getNodeSym(m_modp),
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"__pinNumber"+cvtToStr(nodep->pinNum()), refp, NULL/*packagep*/);
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symp->importable(false);
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}
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// Ports not needed any more
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nodep->unlinkFrBack()->deleteTree(); nodep=NULL;
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@ -53,6 +53,7 @@ private:
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VSymEnt* m_parentp; // Table that created this table, dot notation needed to resolve into it
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AstPackage* m_packagep; // Package node is in (for V3LinkDot, unused here)
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string m_symPrefix; // String to prefix symbols with (for V3LinkDot, unused here)
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bool m_importable; // Allow importing
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#ifdef VL_DEBUG
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static int debug() {
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static int level = -1;
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@ -107,6 +108,8 @@ public:
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AstNode* nodep() const { if (!this) return NULL; else return m_nodep; } // null check so can call .findId(...)->nodep()
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string symPrefix() const { return m_symPrefix; }
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void symPrefix(const string& name) { m_symPrefix = name; }
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bool importable() const { return m_importable; }
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void importable(bool flag) { m_importable = flag; }
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void insert(const string& name, VSymEnt* entp) {
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UINFO(9, " SymInsert se"<<(void*)this<<" '"<<name<<"' se"<<(void*)entp<<" "<<entp->nodep()<<endl);
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if (name != "" && m_idNameMap.find(name) != m_idNameMap.end()) {
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@ -152,13 +155,17 @@ public:
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if (id_or_star != "*") {
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IdNameMap::const_iterator it = srcp->m_idNameMap.find(id_or_star);
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if (it != m_idNameMap.end()) {
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reinsert(it->first, it->second);
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any = true;
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if (it->second->importable()) {
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reinsert(it->first, it->second);
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}
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}
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any = true; // Legal, though perhaps lint questionable to import nothing
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} else {
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for (IdNameMap::const_iterator it=srcp->m_idNameMap.begin(); it!=srcp->m_idNameMap.end(); ++it) {
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reinsert(it->first, it->second);
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any = true;
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if (it->second->importable()) {
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reinsert(it->first, it->second);
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any = true;
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}
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}
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}
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return any;
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@ -244,6 +251,7 @@ inline VSymEnt::VSymEnt(VSymGraph* m_graphp, AstNode* nodep)
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m_fallbackp = NULL;
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m_parentp = NULL;
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m_packagep = NULL;
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m_importable = true;
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m_graphp->pushNewEnt(this);
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}
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18
test_regress/t/t_package_twodeep.pl
Executable file
18
test_regress/t/t_package_twodeep.pl
Executable file
@ -0,0 +1,18 @@
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#!/usr/bin/perl
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if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2003 by Wilson Snyder. This program is free software; you can
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# redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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compile (
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);
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execute (
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check_finished=>1,
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);
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ok(1);
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1;
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31
test_regress/t/t_package_twodeep.v
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31
test_regress/t/t_package_twodeep.v
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@ -0,0 +1,31 @@
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2012 by Jeremy Bennett
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// see bug 591
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package pkg2;
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parameter PARAM2 = 16;
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endpackage // pkg2
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package pkg1;
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import pkg2::*;
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parameter PARAM1 = 8;
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endpackage // pkg1
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module t (/*AUTOARG*/
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// Inputs
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clk
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);
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input clk;
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import pkg1::*;
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reg [PARAM1:0] bus1;
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initial begin
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$write("*-* All Finished *-*\n");
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$finish;
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end
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endmodule
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