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10 lines
281 B
Systemverilog
10 lines
281 B
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2013 by Wilson Snyder.
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// SPDX-License-Identifier: CC0-1.0
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interface t_interface_find_ifc;
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logic [3:0] value;
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endinterface
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