Commit Graph

3301 Commits

Author SHA1 Message Date
Wilson Snyder
bd42e31b2a Tests: For travis, skip Bit::Vector and show intall dates. 2020-03-07 20:08:41 -05:00
Wilson Snyder
6d73237b27 Travis: Don't cpan test to save time. 2020-03-07 19:24:05 -05:00
Wilson Snyder
6c6d70a5e5 Fix FST when multi-model tracing. 2020-03-07 18:39:58 -05:00
Wilson Snyder
6f49f802b1 Tests: Add fst_identical. 2020-03-07 16:59:46 -05:00
Wilson Snyder
808c958d42 Internals: Add AstNodeCCall and other items towards classes. 2020-03-07 12:52:11 -05:00
Wilson Snyder
961ac49c5c Internals: Merge parse type from classes branch. No functional change intended. 2020-03-07 11:00:57 -05:00
Wilson Snyder
2d52f525c5 Add --structs-packed for forward compatibility, #1541. 2020-03-07 10:51:06 -05:00
Wilson Snyder
e70cba77e6 Add support for dynamic arrays, #379. 2020-03-07 10:24:27 -05:00
Wilson Snyder
8054fc47ea Internals: Refectoring. No functional change intended. 2020-03-07 08:24:57 -05:00
Wilson Snyder
e673875b3b Fix clang warning, last commit. 2020-03-06 07:31:56 -05:00
Wilson Snyder
29923b78fd Internals: Use VL_TO_STRING instead of to_string. 2020-03-05 23:28:41 -05:00
Wilson Snyder
135cbcd79a Internals: Move 'new' unsupported forward from parse into Ast. 2020-03-05 22:33:31 -05:00
Wilson Snyder
75ecad591a Implement $displayb/o/h, $writeb/o/h, etc, Closes #1637. 2020-03-05 21:49:25 -05:00
Wilson Snyder
c108f5def9 Commentary, Closes #2177. 2020-03-05 19:09:58 -05:00
Wilson Snyder
dab1cb610a Tests: Allow iv to run SystemVerilog tests 2020-03-05 18:12:10 -05:00
Wilson Snyder
fd656f6cc1 Fix clang asserted missing lock on m_dumping. 2020-03-03 19:20:04 -05:00
Wilson Snyder
a7e65379fa Ignore $dumpflush, think causes travis thread error. 2020-03-02 17:56:42 -05:00
Wilson Snyder
905067d13f Fix $dumpvar multithreaded assert, broke last commit. 2020-03-02 07:43:10 -05:00
Wilson Snyder
30a33a6104 Add support for and , #2126. 2020-03-01 21:39:23 -05:00
Wilson Snyder
0ca0e07354 Internals: Vcd doesn't need code when registering. No functional change intended. 2020-02-29 20:42:52 -05:00
Wilson Snyder
aac02acf92 Tests: Rename 2020-02-29 10:06:52 -05:00
Wilson Snyder
082c9e0b1d Tests: Add two-design trace tests. 2020-02-29 09:44:51 -05:00
Wilson Snyder
a7bd934fe3 Tests: Cleanup false used as 0. No functional change. 2020-02-29 08:56:49 -05:00
David Stanford
e98a380b44
Tests: Update some tests to skip if prerequisites aren't installed (#2181) 2020-02-29 07:20:23 -05:00
Wilson Snyder
4878fe3a1f Add split_var metacomment to assist UNOPTFLAT fixes, #2066. 2020-02-28 19:15:08 -05:00
Wilson Snyder
c6b755a12e Commentary 2020-02-27 19:35:49 -05:00
Wilson Snyder
991d81cd0a Recommend -Os. 2020-02-27 07:46:34 -05:00
Wilson Snyder
c06a97a221 Remove OBJCACHE_HOSTS; dead code. 2020-02-27 07:18:15 -05:00
Wilson Snyder
6131bcdbb0 Verilator_gantt: Fix CPU count in report. 2020-02-27 07:12:50 -05:00
Wilson Snyder
68b6a0b667 Fix genblk naming with directly nested generate blocks, #2176. 2020-02-25 22:21:16 -05:00
Wilson Snyder
4c438bbc67 Commentary 2020-02-25 19:01:14 -05:00
Wilson Snyder
5b83484f20 Remove dead genblk code & some cleanups. 2020-02-25 18:57:51 -05:00
Wilson Snyder
93ac79981b Tests: Rename t_var_dotted. No functional change. 2020-02-24 18:51:44 -05:00
Wilson Snyder
c9b74847d1 Docs: Tighter margins, save 10 pages. 2020-02-24 18:11:56 -05:00
Wilson Snyder
23eb96579c Fix duplicate __STDC_FORMAT_MACROS definition. 2020-02-24 18:11:41 -05:00
Todd Strader
8319ea6c73 Changes 2020-02-24 06:36:13 -05:00
Todd Strader
60f82961b4 De-tabify 2020-02-24 06:36:13 -05:00
Todd Strader
f7d1c6ca72 emacs verilog-batch-indent 2020-02-24 06:36:13 -05:00
Todd Strader
4b4f10f5e6 Follow other clock gating examples 2020-02-24 06:36:13 -05:00
Todd Strader
120f62fe85 Fix is probably to mark as a clock 2020-02-24 06:36:13 -05:00
Todd Strader
db6ecbd57e Test for #2169 2020-02-24 06:36:13 -05:00
Wilson Snyder
28e19cef90 Fix undeclared VL_SHIFTR_WWQ, #2114. 2020-02-23 19:33:37 -05:00
Tobias Wölfel
18f8cd0529
Allow assert disable (#2168)
* Add +verilator+noassert flag

This allows to disable the assert check per simulation argument.

* Add AssertOn check for assert

Insert the check AssertOn to allow disabling of asserts.
Asserts can be disabled by not using the `--assert` flag or by calling
`AssertOn(false)`, or passing the "+verilator+noassert" runtime flag.
Add tests for this behavior.
Bad tests check that the assert still causes a stop.
Non bad tests check that asserts are properly disabled and cause no stop
of the simulation.

Fixes #2162.

Signed-off-by: Tobias Wölfel <tobias.woelfel@mailbox.org>

* Correct file location

Signed-off-by: Tobias Wölfel <tobias.woelfel@mailbox.org>

* Add description for single test execution

Without this description it is not obvious how to run a single test from
the regression test suite.

Signed-off-by: Tobias Wölfel <tobias.woelfel@mailbox.org>
2020-02-15 18:17:23 -06:00
Wilson Snyder
02786b3f09 Commentary 2020-02-12 22:46:59 -05:00
Wilson Snyder
70358e8587 Fix compiler warning. 2020-02-08 10:58:07 -05:00
Wilson Snyder
95b66feeb8 devel release 2020-02-08 09:16:35 -05:00
Wilson Snyder
890cecc15b Version bump 2020-02-08 09:03:51 -05:00
Wilson Snyder
f7bad37e88 Fix GCC 4.4.7 errors. 2020-02-08 07:09:41 -05:00
Wilson Snyder
134b5efd70 Tests: Ignore obj_iv. 2020-02-07 18:00:07 -05:00
Wilson Snyder
0d6ebf21b3 Suggest svSetScope, #2152. 2020-02-07 17:59:02 -05:00