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Fix wide structure VL_TOSTRING_W generation (#4188) (#4189)

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* V3Common.cpp::makeVlToString: fix `VL_TOSTRING_W` statement generation to include width argument

* fix contribution name

* add testcase for long struct `VL_TO_STRING_W` bug
This commit is contained in:
Aylon Chaim Porat 2023-05-10 20:34:44 -04:00 committed by GitHub
parent 2267db093f
commit d5de67c6dc
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4 changed files with 45 additions and 3 deletions
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1
docs/CONTRIBUTORS
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@ -14,6 +14,7 @@ Ameya Vikram Singh
Andreas Kuster
Andrew Nolte
Arkadiusz Kozdra
Aylon Chaim Porat
Cameron Kirk
Chris Randall
Chuxuan Wang

8
src/V3Common.cpp
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@ -82,11 +82,13 @@ static void makeVlToString(AstNodeUOrStructDType* nodep) {
}
stmt += VIdProtect::protect(itemp->prettyName()) + ":\" + ";
if (VN_IS(itemp->dtypep()->skipRefp(), BasicDType) && itemp->isWide()) {
stmt += "VL_TO_STRING_W";
stmt += "VL_TO_STRING_W(";
stmt += cvtToStr(itemp->widthWords());
stmt += ", ";
} else {
stmt += "VL_TO_STRING";
stmt += "VL_TO_STRING(";
}
stmt += "(obj." + itemp->nameProtect() + ");\n";
stmt += "obj." + itemp->nameProtect() + ");\n";
funcp->addStmtsp(new AstCStmt{nodep->fileline(), stmt});
}
funcp->addStmtsp(new AstCStmt{nodep->fileline(), "out += \"}\";\n"});

16
test_regress/t/t_trace_wide_struct.pl Executable file
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@ -0,0 +1,16 @@
#!/usr/bin/env perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
scenarios(simulator => 1);
compile (verilator_flags2 => ['--trace --trace-structs'],);
ok(1);
1;

23
test_regress/t/t_trace_wide_struct.v Normal file
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@ -0,0 +1,23 @@
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2011 by Wilson Snyder.
// SPDX-License-Identifier: CC0-1.0
module t (/*AUTOARG*/
// Inputs
clk
);
input clk;
typedef struct {
logic [64:0] long_signal;
} mystruct_t;
mystruct_t mystruct;
initial begin
$finish;
end
endmodule