From d5de67c6dcb478b304f2a2ace73efc909b83fb95 Mon Sep 17 00:00:00 2001
From: Aylon Chaim Porat <124075536+apstrike@users.noreply.github.com>
Date: Wed, 10 May 2023 20:34:44 -0400
Subject: [PATCH] Fix wide structure VL_TOSTRING_W generation (#4188) (#4189)

* V3Common.cpp::makeVlToString: fix `VL_TOSTRING_W` statement generation to include width argument

* fix contribution name

* add testcase for long struct `VL_TO_STRING_W` bug
---
 docs/CONTRIBUTORS                     |  1 +
 src/V3Common.cpp                      |  8 +++++---
 test_regress/t/t_trace_wide_struct.pl | 16 ++++++++++++++++
 test_regress/t/t_trace_wide_struct.v  | 23 +++++++++++++++++++++++
 4 files changed, 45 insertions(+), 3 deletions(-)
 create mode 100755 test_regress/t/t_trace_wide_struct.pl
 create mode 100644 test_regress/t/t_trace_wide_struct.v

diff --git a/docs/CONTRIBUTORS b/docs/CONTRIBUTORS
index 54a3058fd..2baed846f 100644
--- a/docs/CONTRIBUTORS
+++ b/docs/CONTRIBUTORS
@@ -14,6 +14,7 @@ Ameya Vikram Singh
 Andreas Kuster
 Andrew Nolte
 Arkadiusz Kozdra
+Aylon Chaim Porat
 Cameron Kirk
 Chris Randall
 Chuxuan Wang
diff --git a/src/V3Common.cpp b/src/V3Common.cpp
index 25043d425..4dc587a10 100644
--- a/src/V3Common.cpp
+++ b/src/V3Common.cpp
@@ -82,11 +82,13 @@ static void makeVlToString(AstNodeUOrStructDType* nodep) {
         }
         stmt += VIdProtect::protect(itemp->prettyName()) + ":\" + ";
         if (VN_IS(itemp->dtypep()->skipRefp(), BasicDType) && itemp->isWide()) {
-            stmt += "VL_TO_STRING_W";
+            stmt += "VL_TO_STRING_W(";
+            stmt += cvtToStr(itemp->widthWords());
+            stmt += ", ";
         } else {
-            stmt += "VL_TO_STRING";
+            stmt += "VL_TO_STRING(";
         }
-        stmt += "(obj." + itemp->nameProtect() + ");\n";
+        stmt += "obj." + itemp->nameProtect() + ");\n";
         funcp->addStmtsp(new AstCStmt{nodep->fileline(), stmt});
     }
     funcp->addStmtsp(new AstCStmt{nodep->fileline(), "out += \"}\";\n"});
diff --git a/test_regress/t/t_trace_wide_struct.pl b/test_regress/t/t_trace_wide_struct.pl
new file mode 100755
index 000000000..7914ddcc8
--- /dev/null
+++ b/test_regress/t/t_trace_wide_struct.pl
@@ -0,0 +1,16 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile (verilator_flags2 => ['--trace --trace-structs'],);
+
+ok(1);
+1;
diff --git a/test_regress/t/t_trace_wide_struct.v b/test_regress/t/t_trace_wide_struct.v
new file mode 100644
index 000000000..4a381de5a
--- /dev/null
+++ b/test_regress/t/t_trace_wide_struct.v
@@ -0,0 +1,23 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2011 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t (/*AUTOARG*/
+   // Inputs
+   clk
+   );
+   input clk;
+
+   typedef struct {
+       logic [64:0] long_signal;
+   } mystruct_t;
+
+   mystruct_t mystruct;
+
+   initial begin
+       $finish;
+   end
+
+endmodule