Internals: Misc ANSI port parsing cleanups; baseline for future commit.

This commit is contained in:
Wilson Snyder 2024-12-02 07:21:24 -05:00
parent b4e91c87a6
commit b16b48f458
4 changed files with 24 additions and 15 deletions

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@ -904,7 +904,7 @@ public:
TRIWIRE,
TRI0,
TRI1,
PORT, // Used in parser and V3Fork to recognize ports
PORT, // Used in parser to recognize ports
BLOCKTEMP,
MODULETEMP,
STMTTEMP,

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@ -2082,7 +2082,10 @@ public:
bool isPrimaryIO() const VL_MT_SAFE { return m_primaryIO; }
bool isPrimaryInish() const { return isPrimaryIO() && isNonOutput(); }
bool isIfaceRef() const { return varType() == VVarType::IFACEREF; }
void setIfaceRef() { m_varType = VVarType::IFACEREF; }
void setIfaceRef() {
m_direction = VDirection::NONE;
m_varType = VVarType::IFACEREF;
}
bool isIfaceParent() const { return m_isIfaceParent; }
bool isInternal() const { return m_isInternal; }
bool isSignal() const { return varType().isSignal(); }

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@ -193,7 +193,8 @@ AstVar* V3ParseGrammar::createVariable(FileLine* fileline, const string& name,
AstNodeDType* dtypep = GRAMMARP->m_varDTypep;
UINFO(5, " creVar " << name << " decl=" << GRAMMARP->m_varDecl << " io="
<< GRAMMARP->m_varIO << " dt=" << (dtypep ? "set" : "") << endl);
if (GRAMMARP->m_varIO == VDirection::NONE && GRAMMARP->m_varDecl == VVarType::PORT) {
if (GRAMMARP->m_varIO == VDirection::NONE // In non-ANSI port list
&& GRAMMARP->m_varDecl == VVarType::PORT) {
// Just a port list with variable name (not v2k format); AstPort already created
if (dtypep) fileline->v3warn(E_UNSUPPORTED, "Unsupported: Ranges ignored in port-lists");
if (arrayp) VL_DO_DANGLING(arrayp->deleteTree(), arrayp);
@ -222,7 +223,7 @@ AstVar* V3ParseGrammar::createVariable(FileLine* fileline, const string& name,
// UINFO(0,"CREVAR "<<fileline->ascii()<<" decl="<<GRAMMARP->m_varDecl.ascii()<<"
// io="<<GRAMMARP->m_varIO.ascii()<<endl);
VVarType type = GRAMMARP->m_varDecl;
if (type == VVarType::UNKNOWN) {
if (type == VVarType::UNKNOWN) { // e.g. "output" non-ANSI standalone direction (vs "reg")
if (GRAMMARP->m_varIO.isAny()) {
type = VVarType::PORT;
} else {

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@ -323,6 +323,11 @@ int V3ParseGrammar::s_modTypeImpNum = 0;
{ GRAMMARP->m_varDecl = VVarType::type; }
#define VARIO(type) \
{ GRAMMARP->m_varIO = VDirection::type; }
// Set direction to default-input when detect inside an ANSI port list
#define VARIOANSI(type) \
{ \
if (GRAMMARP->m_varIO == VDirection::NONE) VARIO(INPUT); \
}
#define VARLIFE(flag) \
{ GRAMMARP->m_varLifetime = flag; }
#define VARDTYPE(dtypep) \
@ -1471,7 +1476,7 @@ portsStarE<nodep>: // IEEE: .* + list_of_ports + list_of_port_decla
{ $$ = $3; VARRESET_NONLIST(UNKNOWN); GRAMMARP->m_pinAnsi = false; }
;
list_of_portsE<nodep>: // IEEE: list_of_ports + list_of_port_declarations
list_of_portsE<nodep>: // IEEE: [ list_of_ports + list_of_port_declarations ]
portAndTagE { $$ = $1; }
| list_of_portsE ',' portAndTagE { $$ = addNextNull($1, $3); }
;
@ -1519,13 +1524,13 @@ port<nodep>: // ==IEEE: port
{ // VAR for now, but V3LinkCells may call setIfcaeRef on it later
$$ = $3; VARDECL(VAR); VARIO(NONE);
AstNodeDType* const dtp = new AstIfaceRefDType{$<fl>2, "", *$2};
VARDTYPE(dtp);
VARDTYPE(dtp); VARIOANSI();
addNextNull($$, VARDONEP($$, $4, $5)); }
| portDirNetE id/*interface*/ '.' idAny/*modport*/ portSig variable_dimensionListE sigAttrListE
{ // VAR for now, but V3LinkCells may call setIfcaeRef on it later
$$ = $5; VARDECL(VAR); VARIO(NONE);
AstNodeDType* const dtp = new AstIfaceRefDType{$<fl>2, $<fl>4, "", *$2, *$4};
VARDTYPE(dtp);
VARDTYPE(dtp); VARIOANSI();
addNextNull($$, VARDONEP($$, $6, $7)); }
| portDirNetE yINTERFACE portSig rangeListE sigAttrListE
{ $$ = nullptr; BBUNSUP($<fl>2, "Unsupported: generic interfaces"); }
@ -1537,7 +1542,7 @@ port<nodep>: // ==IEEE: port
BBUNSUP($<fl>2, "Unsupported: interconnect");
AstNodeDType* const dtp = GRAMMARP->addRange(
new AstBasicDType{$2, LOGIC_IMPLICIT, $3}, $4, true);
VARDTYPE(dtp);
VARDTYPE(dtp); VARIOANSI();
addNextNull($$, VARDONEP($$, $6, $7)); }
//
// // IEEE: ansi_port_declaration, with [port_direction] removed
@ -1576,15 +1581,15 @@ port<nodep>: // ==IEEE: port
// // IEEE: portDirNetE data_type '.' portSig -> handled with AstDot in expr.
//
| portDirNetE data_type portSig variable_dimensionListE sigAttrListE
{ $$ = $3; VARDTYPE($2); addNextNull($$, VARDONEP($$, $4, $5)); }
{ $$ = $3; VARDTYPE($2); VARIOANSI(); addNextNull($$, VARDONEP($$, $4, $5)); }
| portDirNetE yVAR data_type portSig variable_dimensionListE sigAttrListE
{ $$ = $4; VARDTYPE($3); addNextNull($$, VARDONEP($$, $5, $6)); }
{ $$ = $4; VARDTYPE($3); VARIOANSI(); addNextNull($$, VARDONEP($$, $5, $6)); }
| portDirNetE yVAR implicit_typeE portSig variable_dimensionListE sigAttrListE
{ $$ = $4; VARDTYPE($3); addNextNull($$, VARDONEP($$, $5, $6)); }
{ $$ = $4; VARDTYPE($3); VARIOANSI(); addNextNull($$, VARDONEP($$, $5, $6)); }
| portDirNetE signing portSig variable_dimensionListE sigAttrListE
{ $$ = $3;
AstNodeDType* const dtp = new AstBasicDType{$3->fileline(), LOGIC_IMPLICIT, $2};
VARDTYPE_NDECL(dtp);
VARDTYPE_NDECL(dtp); VARIOANSI();
addNextNull($$, VARDONEP($$, $4, $5)); }
| portDirNetE signingE rangeList portSig variable_dimensionListE sigAttrListE
{ $$ = $4;
@ -1596,13 +1601,13 @@ port<nodep>: // ==IEEE: port
{ $$ = $2; /*VARDTYPE-same*/ addNextNull($$, VARDONEP($$, $3, $4)); }
//
| portDirNetE data_type portSig variable_dimensionListE sigAttrListE '=' constExpr
{ $$ = $3; VARDTYPE($2);
{ $$ = $3; VARDTYPE($2); VARIOANSI();
if (AstVar* vp = VARDONEP($$, $4, $5)) { addNextNull($$, vp); vp->valuep($7); } }
| portDirNetE yVAR data_type portSig variable_dimensionListE sigAttrListE '=' constExpr
{ $$ = $4; VARDTYPE($3);
{ $$ = $4; VARDTYPE($3); VARIOANSI();
if (AstVar* vp = VARDONEP($$, $5, $6)) { addNextNull($$, vp); vp->valuep($8); } }
| portDirNetE yVAR implicit_typeE portSig variable_dimensionListE sigAttrListE '=' constExpr
{ $$ = $4; VARDTYPE($3);
{ $$ = $4; VARDTYPE($3); VARIOANSI();
if (AstVar* vp = VARDONEP($$, $5, $6)) { addNextNull($$, vp); vp->valuep($8); } }
| portDirNetE /*implicit*/ portSig variable_dimensionListE sigAttrListE '=' constExpr
{ $$ = $2; /*VARDTYPE-same*/