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Fix parallel make running bison twice
git-svn-id: file://localhost/svn/verilator/trunk/verilator@1051 77ca24e4-aefa-0310-84f0-b9a241c72d87
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@ -245,12 +245,15 @@ V3PreProc.o: V3PreProc.cpp V3PreLex.yy.cpp
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#### Generated files
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#### Generated files
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# Target rule called before parallel build to make generated files
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# Target rule called before parallel build to make generated files
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serial:: V3Ast__gen_classes.h
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serial:: V3Ast__gen_classes.h y.tab.c
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V3Ast__gen_classes.h : $(ASTGEN) V3Ast.h V3AstNodes.h
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V3Ast__gen_classes.h : $(ASTGEN) V3Ast.h V3AstNodes.h
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$(PERL) $(ASTGEN) -I$(srcdir) --classes
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$(PERL) $(ASTGEN) -I$(srcdir) --classes
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y.tab.c y.tab.h: verilog.y $(HEADERS)
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y.tab.h: y.tab.c
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# Have only one output file in this rule to prevent parallel make issues
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y.tab.c: verilog.y $(HEADERS)
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@echo "If you get errors from verilog.y below, try upgrading bison to version 1.875 or newer."
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@echo "If you get errors from verilog.y below, try upgrading bison to version 1.875 or newer."
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${YACC} ${YFLAGS} $<
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${YACC} ${YFLAGS} $<
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mv y.tab.c y_pregen.tab.c && $(PERL) $(srcdir)/bisonfix < y_pregen.tab.c > y.tab.c
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mv y.tab.c y_pregen.tab.c && $(PERL) $(srcdir)/bisonfix < y_pregen.tab.c > y.tab.c
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