From 36e84973ec1b9bebf0e436592abbc5b5696a4424 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Tue, 6 May 2008 15:45:41 +0000 Subject: [PATCH] Fix parallel make running bison twice git-svn-id: file://localhost/svn/verilator/trunk/verilator@1051 77ca24e4-aefa-0310-84f0-b9a241c72d87 --- src/Makefile_obj.in | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/Makefile_obj.in b/src/Makefile_obj.in index 6b247917a..9a54ef930 100644 --- a/src/Makefile_obj.in +++ b/src/Makefile_obj.in @@ -245,12 +245,15 @@ V3PreProc.o: V3PreProc.cpp V3PreLex.yy.cpp #### Generated files # Target rule called before parallel build to make generated files -serial:: V3Ast__gen_classes.h +serial:: V3Ast__gen_classes.h y.tab.c V3Ast__gen_classes.h : $(ASTGEN) V3Ast.h V3AstNodes.h $(PERL) $(ASTGEN) -I$(srcdir) --classes -y.tab.c y.tab.h: verilog.y $(HEADERS) +y.tab.h: y.tab.c + +# Have only one output file in this rule to prevent parallel make issues +y.tab.c: verilog.y $(HEADERS) @echo "If you get errors from verilog.y below, try upgrading bison to version 1.875 or newer." ${YACC} ${YFLAGS} $< mv y.tab.c y_pregen.tab.c && $(PERL) $(srcdir)/bisonfix < y_pregen.tab.c > y.tab.c