forked from github/verilator
165 lines
1.9 KiB
Plaintext
165 lines
1.9 KiB
Plaintext
$version Generated by VerilatedVcd $end
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$date Mon Jan 29 09:34:59 2018
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$end
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$timescale 1ps $end
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$scope module top $end
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$scope module t $end
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$var wire 32 % c_trace_on [31:0] $end
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$var wire 1 # clk $end
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$var wire 32 $ cyc [31:0] $end
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$var real 64 & r $end
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$upscope $end
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$upscope $end
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$enddefinitions $end
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#0
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0#
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b00000000000000000000000000000001 $
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b00000000000000000000000000000000 %
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r0 &
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#10000
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1#
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b00000000000000000000000000000010 $
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r0.1 &
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#11000
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#12000
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#13000
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#14000
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#15000
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0#
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#16000
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#17000
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#18000
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#19000
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#20000
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1#
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b00000000000000000000000000000011 $
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b00000000000000000000000000000001 %
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r0.2 &
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#21000
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#22000
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#23000
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#24000
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#25000
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0#
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#26000
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#27000
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#28000
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#29000
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#30000
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1#
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b00000000000000000000000000000100 $
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b00000000000000000000000000000010 %
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r0.3 &
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#31000
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#32000
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#33000
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#34000
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#35000
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0#
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#36000
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#39000
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#40000
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1#
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b00000000000000000000000000000101 $
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b00000000000000000000000000000011 %
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r0.4 &
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#41000
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#42000
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#43000
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#44000
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#45000
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0#
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#46000
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#47000
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#48000
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#49000
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#50000
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1#
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b00000000000000000000000000000110 $
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b00000000000000000000000000000100 %
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r0.5 &
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#51000
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#52000
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#53000
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#54000
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#55000
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0#
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#56000
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#57000
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#58000
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#59000
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#60000
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1#
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b00000000000000000000000000000111 $
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b00000000000000000000000000000101 %
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r0.6 &
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#61000
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#62000
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#63000
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#64000
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#65000
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0#
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#66000
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#67000
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#68000
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#69000
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#70000
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1#
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b00000000000000000000000000001000 $
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b00000000000000000000000000000110 %
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r0.7 &
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#71000
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#72000
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#73000
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#74000
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#75000
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0#
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#76000
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#77000
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#78000
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#79000
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#80000
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1#
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b00000000000000000000000000001001 $
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b00000000000000000000000000000111 %
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r0.7999999999999999 &
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#81000
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#82000
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#83000
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#84000
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#85000
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0#
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#86000
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#87000
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#88000
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#89000
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#90000
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1#
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b00000000000000000000000000001010 $
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b00000000000000000000000000001000 %
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r0.8999999999999999 &
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#91000
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#92000
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#93000
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#94000
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#95000
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0#
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#96000
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#97000
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#98000
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#99000
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#100000
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1#
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b00000000000000000000000000001011 $
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b00000000000000000000000000001001 %
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r0.9999999999999999 &
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#101000
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#102000
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#103000
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#104000
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