verilator/test_regress/t/t_preproc_kwd_bad.v
2022-10-22 12:17:56 -04:00

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271 B
Systemverilog

// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2003 by Wilson Snyder.
// SPDX-License-Identifier: CC0-1.0
`end_keywords
`end_keywords // BAD
module t;
endmodule