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21 lines
445 B
Systemverilog
21 lines
445 B
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2011 by Wilson Snyder.
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// SPDX-License-Identifier: CC0-1.0
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//bug485, but see t_gen_forif.v for an OK example.
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module t (/*AUTOARG*/);
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always_comb begin
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integer i;
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for(i=0; i<10; i++ ) begin: COMB
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end
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for(i=0; i<9; i++ ) begin: COMB
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end
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end
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endmodule
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