verilator/test_regress/t/t_struct_initial_assign.py
Wilson Snyder 85909f02b3 Commentary
2024-10-04 05:21:18 -04:00

19 lines
538 B
Python
Executable File

#!/usr/bin/env python3
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2024 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
import vltest_bootstrap
test.scenarios('simulator')
test.compile(verilator_flags2=["--timing"])
test.execute(fails=test.vlt_all) # Issue #5381
test.passes()