verilator/test_regress/t/t_runflag.v
2018-05-20 08:40:35 -04:00

12 lines
259 B
Verilog

// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2003 by Wilson Snyder.
module t;
initial begin
$write("*-* All Finished *-*\n");
$finish;
end
endmodule