verilator/test_regress/t/t_runflag.v

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2018-05-20 12:40:35 +00:00
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2003 by Wilson Snyder.
module t;
initial begin
$write("*-* All Finished *-*\n");
$finish;
end
endmodule