verilator/test_regress/t/t_sys_psprintf.v
Arkadiusz Kozdra d4c3e35f97
Support $psprintf system function (#4314) (#5169)
`$psprintf` is a non-standard system function present in some other
simulators, and has been rejected for standardization by IEEE because
of being basically the same as `$sformatf`.

To encourage users to fix their codebase, a warning is emitted by
default, but it gets otherwise interpreted as `$sformatf` as early as
during lexing.

Signed-off-by: Arkadiusz Kozdra <akozdra@antmicro.com>

* wording/formatting

Signed-off-by: Arkadiusz Kozdra <akozdra@antmicro.com>

---------

Signed-off-by: Arkadiusz Kozdra <akozdra@antmicro.com>
2024-06-10 08:38:26 -04:00

30 lines
705 B
Systemverilog

// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2024 by Antmicro Ltd.
// SPDX-License-Identifier: CC0-1.0
module t;
// Note $sformatf already tested elsewhere
reg [3:0] n;
reg [63:0] q;
reg [16*8:1] wide;
string str;
initial begin
n = 4'b1100;
q = 64'h1234_5678_abcd_0123;
wide = "hello-there12345";
str = $psprintf("n=%b q=%d w=%s", n, q, wide);
`ifdef TEST_VERBOSE $display("str=%0s",str); `endif
if (str !== "n=1100 q= 1311768467750060323 w=hello-there12345") $stop;
$write("*-* All Finished *-*\n");
$finish;
end
endmodule