mirror of
https://github.com/verilator/verilator.git
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592 lines
28 KiB
C++
592 lines
28 KiB
C++
// -*- mode: C++; c-file-style: "cc-mode" -*-
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//*************************************************************************
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// DESCRIPTION: Verilator: Collect and print statistics
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//
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// Code available from: https://verilator.org
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//
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//*************************************************************************
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//
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// Copyright 2005-2024 by Wilson Snyder. This program is free software; you
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// can redistribute it and/or modify it under the terms of either the GNU
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// Lesser General Public License Version 3 or the Perl Artistic License
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// Version 2.0.
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// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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//
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//*************************************************************************
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// Pre steps:
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// Attach clocks to each assertion
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// Substitute property references by property body (IEEE 1800-2012 16.12.1).
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// Transform clocking blocks into imperative logic
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//*************************************************************************
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#include "V3PchAstNoMT.h" // VL_MT_DISABLED_CODE_UNIT
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#include "V3AssertPre.h"
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#include "V3Const.h"
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#include "V3Task.h"
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#include "V3UniqueNames.h"
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VL_DEFINE_DEBUG_FUNCTIONS;
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//######################################################################
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// Assert class functions
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class AssertPreVisitor final : public VNVisitor {
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// Removes clocks and other pre-optimizations
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// Eventually inlines calls to sequences, properties, etc.
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// We're not parsing the tree, or anything more complicated.
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private:
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// NODE STATE
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const VNUser1InUse m_inuser1;
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// STATE
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// Current context:
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AstNetlist* const m_netlistp = nullptr; // Current netlist
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AstNodeModule* m_modp = nullptr; // Current module
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AstClocking* m_clockingp = nullptr; // Current clocking block
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// Reset each module:
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AstClocking* m_defaultClockingp = nullptr; // Default clocking for the current module
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// Reset each assertion:
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AstSenItem* m_senip = nullptr; // Last sensitivity
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// Reset each always:
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AstSenItem* m_seniAlwaysp = nullptr; // Last sensitivity in always
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// Reset each assertion:
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AstNodeExpr* m_disablep = nullptr; // Last disable
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// Other:
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V3UniqueNames m_cycleDlyNames{"__VcycleDly"}; // Cycle delay counter name generator
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bool m_inAssign = false; // True if in an AssignNode
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bool m_inAssignDlyLhs = false; // True if in AssignDly's LHS
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bool m_inSynchDrive = false; // True if in synchronous drive
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std::vector<AstVarXRef*> m_xrefsp; // list of xrefs that need name fixup
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// METHODS
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AstSenTree* newSenTree(AstNode* nodep, AstSenTree* useTreep = nullptr) {
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// Create sentree based on clocked or default clock
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// Return nullptr for always
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if (useTreep) return useTreep;
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AstSenTree* newp = nullptr;
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AstSenItem* senip = m_senip;
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if (!senip && m_defaultClockingp) senip = m_defaultClockingp->sensesp();
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if (!senip) senip = m_seniAlwaysp;
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if (!senip) {
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nodep->v3warn(E_UNSUPPORTED, "Unsupported: Unclocked assertion");
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newp = new AstSenTree{nodep->fileline(), nullptr};
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} else {
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newp = new AstSenTree{nodep->fileline(), senip->cloneTree(true)};
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}
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return newp;
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}
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void clearAssertInfo() {
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m_senip = nullptr;
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m_disablep = nullptr;
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}
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AstPropSpec* getPropertyExprp(const AstProperty* const propp) {
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// The only statements possible in AstProperty are AstPropSpec (body)
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// and AstVar (arguments).
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AstNode* propExprp = propp->stmtsp();
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while (VN_IS(propExprp, Var)) propExprp = propExprp->nextp();
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return VN_CAST(propExprp, PropSpec);
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}
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void replaceVarRefsWithExprRecurse(AstNode* const nodep, const AstVar* varp,
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AstNode* const exprp) {
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if (!nodep) return;
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if (const AstVarRef* varrefp = VN_CAST(nodep, VarRef)) {
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if (varp == varrefp->varp()) nodep->replaceWith(exprp->cloneTree(false));
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}
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replaceVarRefsWithExprRecurse(nodep->op1p(), varp, exprp);
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replaceVarRefsWithExprRecurse(nodep->op2p(), varp, exprp);
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replaceVarRefsWithExprRecurse(nodep->op3p(), varp, exprp);
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replaceVarRefsWithExprRecurse(nodep->op4p(), varp, exprp);
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}
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AstPropSpec* substitutePropertyCall(AstPropSpec* nodep) {
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if (AstFuncRef* const funcrefp = VN_CAST(nodep->propp(), FuncRef)) {
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if (AstProperty* const propp = VN_CAST(funcrefp->taskp(), Property)) {
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AstPropSpec* propExprp = getPropertyExprp(propp);
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// Substitute inner property call before copying in order to not doing the same for
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// each call of outer property call.
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propExprp = substitutePropertyCall(propExprp);
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// Clone subtree after substitution. It is needed, because property might be called
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// multiple times with different arguments.
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propExprp = propExprp->cloneTree(false);
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// Substitute formal arguments with actual arguments
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const V3TaskConnects tconnects = V3Task::taskConnects(funcrefp, propp->stmtsp());
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for (const auto& tconnect : tconnects) {
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const AstVar* const portp = tconnect.first;
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AstArg* const argp = tconnect.second;
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AstNode* const pinp = argp->exprp()->unlinkFrBack();
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replaceVarRefsWithExprRecurse(propExprp, portp, pinp);
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VL_DO_DANGLING(pushDeletep(pinp), pinp);
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}
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// Handle case with 2 disable iff statement (IEEE 1800-2023 16.12.1)
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if (nodep->disablep() && propExprp->disablep()) {
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nodep->v3error("disable iff expression before property call and in its "
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"body is not legal");
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pushDeletep(propExprp->disablep()->unlinkFrBack());
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}
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// If disable iff is in outer property, move it to inner
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if (nodep->disablep()) {
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AstNodeExpr* const disablep = nodep->disablep()->unlinkFrBack();
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propExprp->disablep(disablep);
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}
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if (nodep->sensesp() && propExprp->sensesp()) {
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nodep->v3warn(E_UNSUPPORTED,
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"Unsupported: Clock event before property call and in its body");
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pushDeletep(propExprp->sensesp()->unlinkFrBack());
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}
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// If clock event is in outer property, move it to inner
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if (nodep->sensesp()) {
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AstSenItem* const sensesp = nodep->sensesp();
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sensesp->unlinkFrBack();
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propExprp->sensesp(sensesp);
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}
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// Now substitute property reference with property body
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nodep->replaceWith(propExprp);
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return propExprp;
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}
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}
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return nodep;
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}
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// VISITORS
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//========== Statements
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void visit(AstClocking* const nodep) override {
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VL_RESTORER(m_clockingp);
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m_clockingp = nodep;
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UINFO(8, " CLOCKING" << nodep << endl);
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iterateChildren(nodep);
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if (nodep->eventp()) nodep->addNextHere(nodep->eventp()->unlinkFrBack());
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VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
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}
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void visit(AstClockingItem* const nodep) override {
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// Get a ref to the sampled/driven variable
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AstVar* const varp = nodep->varp();
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if (!varp) {
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// Unused item
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pushDeletep(nodep->unlinkFrBack());
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return;
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}
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FileLine* const flp = nodep->fileline();
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V3Const::constifyEdit(nodep->skewp());
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if (!VN_IS(nodep->skewp(), Const)) {
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nodep->skewp()->v3error("Skew must be constant (IEEE 1800-2023 14.4)");
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VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
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return;
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}
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AstConst* const skewp = VN_AS(nodep->skewp(), Const);
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if (skewp->num().isNegative()) skewp->v3error("Skew cannot be negative");
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AstNodeExpr* const exprp = nodep->exprp();
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varp->name(m_clockingp->name() + "__DOT__" + varp->name());
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m_clockingp->addNextHere(varp->unlinkFrBack());
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varp->user1p(nodep);
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if (nodep->direction() == VDirection::OUTPUT) {
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exprp->foreach([](AstNodeVarRef* varrefp) {
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// Prevent confusing BLKANDNBLK warnings on clockvars due to generated assignments
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varrefp->fileline()->warnOff(V3ErrorCode::BLKANDNBLK, true);
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});
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AstVarRef* const skewedReadRefp = new AstVarRef{flp, varp, VAccess::READ};
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skewedReadRefp->user1(true);
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// Initialize the clockvar
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AstVarRef* const skewedWriteRefp = new AstVarRef{flp, varp, VAccess::WRITE};
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skewedWriteRefp->user1(true);
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AstInitialStatic* const initClockvarp = new AstInitialStatic{
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flp, new AstAssign{flp, skewedWriteRefp, exprp->cloneTreePure(false)}};
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m_modp->addStmtsp(initClockvarp);
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// A var to keep the previous value of the clockvar
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AstVar* const prevVarp = new AstVar{
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flp, VVarType::MODULETEMP, "__Vclocking_prev__" + varp->name(), exprp->dtypep()};
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prevVarp->lifetime(VLifetime::STATIC);
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AstInitialStatic* const initPrevClockvarp = new AstInitialStatic{
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flp, new AstAssign{flp, new AstVarRef{flp, prevVarp, VAccess::WRITE},
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skewedReadRefp->cloneTreePure(false)}};
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m_modp->addStmtsp(prevVarp);
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m_modp->addStmtsp(initPrevClockvarp);
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// Assign the clockvar to the actual var; only do it if the clockvar's value has
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// changed
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AstAssign* const assignp
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= new AstAssign{flp, exprp->cloneTreePure(false), skewedReadRefp};
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AstIf* const ifp
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= new AstIf{flp,
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new AstNeq{flp, new AstVarRef{flp, prevVarp, VAccess::READ},
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skewedReadRefp->cloneTreePure(false)},
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assignp};
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ifp->addThensp(new AstAssign{flp, new AstVarRef{flp, prevVarp, VAccess::WRITE},
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skewedReadRefp->cloneTree(false)});
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if (skewp->isZero()) {
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// Drive the var in Re-NBA (IEEE 1800-2023 14.16)
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AstSenTree* senTreep
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= new AstSenTree{flp, m_clockingp->sensesp()->cloneTree(false)};
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senTreep->addSensesp(
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new AstSenItem{flp, VEdgeType::ET_CHANGED, skewedReadRefp->cloneTree(false)});
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AstCMethodHard* const trigp = new AstCMethodHard{
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nodep->fileline(),
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new AstVarRef{flp, m_clockingp->ensureEventp(), VAccess::READ}, "isTriggered"};
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trigp->dtypeSetBit();
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ifp->condp(new AstLogAnd{flp, ifp->condp()->unlinkFrBack(), trigp});
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m_clockingp->addNextHere(new AstAlwaysReactive{flp, senTreep, ifp});
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} else if (skewp->fileline()->timingOn()) {
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// Create a fork so that this AlwaysObserved can be retriggered before the
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// assignment happens. Also then it can be combo, avoiding the need for creating
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// new triggers.
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AstFork* const forkp = new AstFork{flp, "", ifp};
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forkp->joinType(VJoinType::JOIN_NONE);
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// Use Observed for this to make sure we do not miss the event
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m_clockingp->addNextHere(new AstAlwaysObserved{
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flp, new AstSenTree{flp, m_clockingp->sensesp()->cloneTree(false)}, forkp});
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if (v3Global.opt.timing().isSetTrue()) {
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AstDelay* const delayp = new AstDelay{flp, skewp->unlinkFrBack(), false};
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delayp->timeunit(m_modp->timeunit());
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assignp->timingControlp(delayp);
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} else if (v3Global.opt.timing().isSetFalse()) {
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nodep->v3warn(E_NOTIMING,
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"Clocking output skew greater than #0 requires --timing");
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} else {
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nodep->v3warn(E_NEEDTIMINGOPT,
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"Use --timing or --no-timing to specify how "
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"clocking output skew greater than #0 should be handled");
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}
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}
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} else if (nodep->direction() == VDirection::INPUT) {
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// Ref to the clockvar
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AstVarRef* const refp = new AstVarRef{flp, varp, VAccess::WRITE};
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refp->user1(true);
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if (skewp->num().is1Step()) {
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// Assign the sampled expression to the clockvar (IEEE 1800-2023 14.13)
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AstSampled* const sampledp = new AstSampled{flp, exprp->cloneTreePure(false)};
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sampledp->dtypeFrom(exprp);
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m_clockingp->addNextHere(new AstAssignW{flp, refp, sampledp});
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} else if (skewp->isZero()) {
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// #0 means the var has to be sampled in Observed (IEEE 1800-2023 14.13)
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AstAssign* const assignp = new AstAssign{flp, refp, exprp->cloneTreePure(false)};
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m_clockingp->addNextHere(new AstAlwaysObserved{
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flp, new AstSenTree{flp, m_clockingp->sensesp()->cloneTree(false)}, assignp});
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} else {
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// Create a queue where we'll store sampled values with timestamps
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AstSampleQueueDType* const queueDtp
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= new AstSampleQueueDType{flp, exprp->dtypep()};
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m_netlistp->typeTablep()->addTypesp(queueDtp);
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AstVar* const queueVarp
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= new AstVar{flp, VVarType::MODULETEMP, "__Vqueue__" + varp->name(), queueDtp};
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queueVarp->lifetime(VLifetime::STATIC);
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m_clockingp->addNextHere(queueVarp);
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// Create a process like this:
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// always queue.push(<sampled var>);
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AstCMethodHard* const pushp = new AstCMethodHard{
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flp, new AstVarRef{flp, queueVarp, VAccess::WRITE}, "push",
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new AstTime{nodep->fileline(), m_modp->timeunit()}};
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pushp->addPinsp(exprp->cloneTreePure(false));
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pushp->dtypeSetVoid();
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m_clockingp->addNextHere(
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new AstAlways{flp, VAlwaysKwd::ALWAYS, nullptr, pushp->makeStmt()});
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// Create a process like this:
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// always @<clocking event> queue.pop(<skew>, /*out*/<skewed var>);
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AstCMethodHard* const popp = new AstCMethodHard{
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flp, new AstVarRef{flp, queueVarp, VAccess::READWRITE}, "pop",
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new AstTime{nodep->fileline(), m_modp->timeunit()}};
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popp->addPinsp(skewp->unlinkFrBack());
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popp->addPinsp(refp);
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popp->dtypeSetVoid();
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m_clockingp->addNextHere(
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new AstAlways{flp, VAlwaysKwd::ALWAYS,
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new AstSenTree{flp, m_clockingp->sensesp()->cloneTree(false)},
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popp->makeStmt()});
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}
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} else {
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nodep->v3fatal("Invalid direction");
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}
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VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
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}
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void visit(AstDelay* nodep) override {
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// Only cycle delays are relevant in this stage; also only process once
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if (!nodep->isCycleDelay()) {
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if (m_inSynchDrive) {
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nodep->v3error("Only cycle delays can be used in synchronous drives"
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" (IEEE 1800-2023 14.16)");
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}
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iterateChildren(nodep);
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return;
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}
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if (m_inAssign && !m_inSynchDrive) {
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nodep->v3error("Cycle delays not allowed as intra-assignment delays"
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" (IEEE 1800-2023 14.11)");
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VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
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return;
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}
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if (nodep->stmtsp()) nodep->addNextHere(nodep->stmtsp()->unlinkFrBackWithNext());
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FileLine* const flp = nodep->fileline();
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AstNodeExpr* valuep = V3Const::constifyEdit(nodep->lhsp()->unlinkFrBack());
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AstConst* const constp = VN_CAST(valuep, Const);
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if (constp->isZero()) {
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nodep->v3warn(E_UNSUPPORTED, "Unsupported: ##0 delays");
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VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
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VL_DO_DANGLING(valuep->deleteTree(), valuep);
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return;
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}
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if (!m_defaultClockingp) {
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nodep->v3error("Usage of cycle delays requires default clocking"
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" (IEEE 1800-2023 14.11)");
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VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
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VL_DO_DANGLING(valuep->deleteTree(), valuep);
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return;
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}
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AstEventControl* const controlp = new AstEventControl{
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nodep->fileline(),
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new AstSenTree{flp, m_defaultClockingp->sensesp()->cloneTree(false)}, nullptr};
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const std::string delayName = m_cycleDlyNames.get(nodep);
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AstVar* const cntVarp = new AstVar{flp, VVarType::BLOCKTEMP, delayName + "__counter",
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nodep->findBasicDType(VBasicDTypeKwd::UINT32)};
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cntVarp->lifetime(VLifetime::AUTOMATIC);
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cntVarp->funcLocal(true);
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AstBegin* const beginp = new AstBegin{flp, delayName + "__block", cntVarp, false, true};
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beginp->addStmtsp(new AstAssign{flp, new AstVarRef{flp, cntVarp, VAccess::WRITE}, valuep});
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beginp->addStmtsp(new AstWhile{
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nodep->fileline(),
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new AstGt{flp, new AstVarRef{flp, cntVarp, VAccess::READ}, new AstConst{flp, 0}},
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controlp,
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new AstAssign{flp, new AstVarRef{flp, cntVarp, VAccess::WRITE},
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new AstSub{flp, new AstVarRef{flp, cntVarp, VAccess::READ},
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new AstConst{flp, 1}}}});
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nodep->replaceWith(beginp);
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VL_DO_DANGLING(nodep->deleteTree(), nodep);
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}
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void visit(AstSenTree* nodep) override {
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if (m_inSynchDrive) {
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nodep->v3error("Event controls cannot be used in "
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"synchronous drives (IEEE 1800-2023 14.16)");
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}
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}
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void visit(AstNodeVarRef* nodep) override {
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UINFO(8, " -varref: " << nodep << endl);
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UINFO(8, " -varref-var-back: " << nodep->varp()->backp() << endl);
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UINFO(8, " -varref-var-user1: " << nodep->varp()->user1p() << endl);
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if (AstClockingItem* const itemp = VN_CAST(
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nodep->varp()->user1p() ? nodep->varp()->user1p() : nodep->varp()->firstAbovep(),
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ClockingItem)) {
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if (nodep->user1()) return;
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// ensure linking still works, this has to be done only once
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if (AstVarXRef* xrefp = VN_CAST(nodep, VarXRef)) {
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UINFO(8, " -clockvarxref-in: " << xrefp << endl);
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string dotted = xrefp->dotted();
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const size_t dotPos = dotted.rfind('.');
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dotted.erase(dotPos, string::npos);
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xrefp->dotted(dotted);
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UINFO(8, " -clockvarxref-out: " << xrefp << endl);
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m_xrefsp.emplace_back(xrefp);
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}
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if (nodep->access().isReadOrRW() && itemp->direction() == VDirection::OUTPUT) {
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nodep->v3error("Cannot read from output clockvar (IEEE 1800-2023 14.3)");
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}
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if (nodep->access().isWriteOrRW()) {
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if (itemp->direction() == VDirection::OUTPUT) {
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if (!m_inAssignDlyLhs) {
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nodep->v3error("Only non-blocking assignments can write "
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"to clockvars (IEEE 1800-2023 14.16)");
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}
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if (m_inAssign) m_inSynchDrive = true;
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} else if (itemp->direction() == VDirection::INPUT) {
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nodep->v3error("Cannot write to input clockvar (IEEE 1800-2023 14.3)");
|
|
}
|
|
}
|
|
nodep->user1(true);
|
|
}
|
|
}
|
|
void visit(AstMemberSel* nodep) override {
|
|
if (AstClockingItem* const itemp = VN_CAST(
|
|
nodep->varp()->user1p() ? nodep->varp()->user1p() : nodep->varp()->firstAbovep(),
|
|
ClockingItem)) {
|
|
if (nodep->access().isReadOrRW() && itemp->direction() == VDirection::OUTPUT) {
|
|
nodep->v3error("Cannot read from output clockvar (IEEE 1800-2023 14.3)");
|
|
}
|
|
if (nodep->access().isWriteOrRW()) {
|
|
if (itemp->direction() == VDirection::OUTPUT) {
|
|
if (!m_inAssignDlyLhs) {
|
|
nodep->v3error("Only non-blocking assignments can write "
|
|
"to clockvars (IEEE 1800-2023 14.16)");
|
|
}
|
|
if (m_inAssign) m_inSynchDrive = true;
|
|
} else if (itemp->direction() == VDirection::INPUT) {
|
|
nodep->v3error("Cannot write to input clockvar (IEEE 1800-2023 14.3)");
|
|
}
|
|
}
|
|
}
|
|
}
|
|
void visit(AstNodeAssign* nodep) override {
|
|
if (nodep->user1()) return;
|
|
VL_RESTORER(m_inAssign);
|
|
VL_RESTORER(m_inSynchDrive);
|
|
m_inAssign = true;
|
|
m_inSynchDrive = false;
|
|
{
|
|
VL_RESTORER(m_inAssignDlyLhs);
|
|
m_inAssignDlyLhs = VN_IS(nodep, AssignDly);
|
|
iterate(nodep->lhsp());
|
|
}
|
|
iterate(nodep->rhsp());
|
|
if (nodep->timingControlp()) {
|
|
iterate(nodep->timingControlp());
|
|
} else if (m_inSynchDrive) {
|
|
AstAssign* const assignp = new AstAssign{
|
|
nodep->fileline(), nodep->lhsp()->unlinkFrBack(), nodep->rhsp()->unlinkFrBack()};
|
|
assignp->user1(true);
|
|
nodep->replaceWith(assignp);
|
|
VL_DO_DANGLING(nodep->deleteTree(), nodep);
|
|
}
|
|
}
|
|
void visit(AstAlways* nodep) override {
|
|
iterateAndNextNull(nodep->sensesp());
|
|
if (nodep->sensesp()) m_seniAlwaysp = nodep->sensesp()->sensesp();
|
|
iterateAndNextNull(nodep->stmtsp());
|
|
m_seniAlwaysp = nullptr;
|
|
}
|
|
|
|
void visit(AstNodeCoverOrAssert* nodep) override {
|
|
if (nodep->sentreep()) return; // Already processed
|
|
clearAssertInfo();
|
|
// Find Clocking's buried under nodep->exprsp
|
|
iterateChildren(nodep);
|
|
if (!nodep->immediate()) nodep->sentreep(newSenTree(nodep));
|
|
clearAssertInfo();
|
|
}
|
|
void visit(AstFell* nodep) override {
|
|
if (nodep->user1SetOnce()) return;
|
|
iterateChildren(nodep);
|
|
FileLine* const fl = nodep->fileline();
|
|
AstNodeExpr* exprp = nodep->exprp()->unlinkFrBack();
|
|
if (exprp->width() > 1) exprp = new AstSel{fl, exprp, 0, 1};
|
|
AstSenTree* sentreep = nodep->sentreep();
|
|
if (sentreep) sentreep->unlinkFrBack();
|
|
AstNodeExpr* const past = new AstPast{fl, exprp, nullptr};
|
|
past->dtypeFrom(exprp);
|
|
exprp = new AstAnd{fl, past, new AstNot{fl, exprp->cloneTreePure(false)}};
|
|
exprp->dtypeSetBit();
|
|
nodep->replaceWith(exprp);
|
|
nodep->sentreep(newSenTree(nodep, sentreep));
|
|
VL_DO_DANGLING(pushDeletep(nodep), nodep);
|
|
}
|
|
void visit(AstPast* nodep) override {
|
|
if (nodep->sentreep()) return; // Already processed
|
|
iterateChildren(nodep);
|
|
nodep->sentreep(newSenTree(nodep));
|
|
}
|
|
void visit(AstRose* nodep) override {
|
|
if (nodep->user1SetOnce()) return;
|
|
iterateChildren(nodep);
|
|
FileLine* const fl = nodep->fileline();
|
|
AstNodeExpr* exprp = nodep->exprp()->unlinkFrBack();
|
|
if (exprp->width() > 1) exprp = new AstSel{fl, exprp, 0, 1};
|
|
AstSenTree* sentreep = nodep->sentreep();
|
|
if (sentreep) sentreep->unlinkFrBack();
|
|
AstNodeExpr* const past = new AstPast{fl, exprp, nullptr};
|
|
past->dtypeFrom(exprp);
|
|
exprp = new AstAnd{fl, new AstNot{fl, past}, exprp->cloneTreePure(false)};
|
|
exprp->dtypeSetBit();
|
|
nodep->replaceWith(exprp);
|
|
nodep->sentreep(newSenTree(nodep, sentreep));
|
|
VL_DO_DANGLING(pushDeletep(nodep), nodep);
|
|
}
|
|
void visit(AstStable* nodep) override {
|
|
if (nodep->user1SetOnce()) return;
|
|
iterateChildren(nodep);
|
|
FileLine* const fl = nodep->fileline();
|
|
AstNodeExpr* exprp = nodep->exprp()->unlinkFrBack();
|
|
AstSenTree* sentreep = nodep->sentreep();
|
|
if (sentreep) sentreep->unlinkFrBack();
|
|
AstNodeExpr* const past = new AstPast{fl, exprp, nullptr};
|
|
past->dtypeFrom(exprp);
|
|
exprp = new AstEq{fl, past, exprp->cloneTreePure(false)};
|
|
exprp->dtypeSetBit();
|
|
nodep->replaceWith(exprp);
|
|
nodep->sentreep(newSenTree(nodep, sentreep));
|
|
VL_DO_DANGLING(pushDeletep(nodep), nodep);
|
|
}
|
|
|
|
void visit(AstImplication* nodep) override {
|
|
if (nodep->sentreep()) return; // Already processed
|
|
|
|
FileLine* const fl = nodep->fileline();
|
|
AstNodeExpr* const rhsp = nodep->rhsp()->unlinkFrBack();
|
|
AstNodeExpr* lhsp = nodep->lhsp()->unlinkFrBack();
|
|
|
|
if (m_disablep) lhsp = new AstAnd{fl, new AstNot{fl, m_disablep}, lhsp};
|
|
|
|
AstNodeExpr* const past = new AstPast{fl, lhsp, nullptr};
|
|
past->dtypeFrom(lhsp);
|
|
AstNodeExpr* const exprp = new AstOr{fl, new AstNot{fl, past}, rhsp};
|
|
exprp->dtypeSetBit();
|
|
nodep->replaceWith(exprp);
|
|
nodep->sentreep(newSenTree(nodep));
|
|
VL_DO_DANGLING(pushDeletep(nodep), nodep);
|
|
}
|
|
|
|
void visit(AstPropSpec* nodep) override {
|
|
nodep = substitutePropertyCall(nodep);
|
|
// No need to iterate the body, once replace will get iterated
|
|
iterateAndNextNull(nodep->sensesp());
|
|
if (m_senip)
|
|
nodep->v3warn(E_UNSUPPORTED, "Unsupported: Only one PSL clock allowed per assertion");
|
|
// Block is the new expression to evaluate
|
|
AstNodeExpr* blockp = VN_AS(nodep->propp()->unlinkFrBack(), NodeExpr);
|
|
if (AstNodeExpr* const disablep = nodep->disablep()) {
|
|
m_disablep = disablep->cloneTreePure(false);
|
|
if (VN_IS(nodep->backp(), Cover)) {
|
|
blockp = new AstAnd{disablep->fileline(),
|
|
new AstNot{disablep->fileline(), disablep->unlinkFrBack()},
|
|
blockp};
|
|
} else {
|
|
blockp = new AstOr{disablep->fileline(), disablep->unlinkFrBack(), blockp};
|
|
}
|
|
}
|
|
// Unlink and just keep a pointer to it, convert to sentree as needed
|
|
m_senip = nodep->sensesp();
|
|
nodep->replaceWith(blockp);
|
|
VL_DO_DANGLING(pushDeletep(nodep), nodep);
|
|
}
|
|
void visit(AstNodeModule* nodep) override {
|
|
VL_RESTORER(m_defaultClockingp);
|
|
VL_RESTORER(m_modp);
|
|
m_defaultClockingp = nullptr;
|
|
nodep->foreach([&](AstClocking* const clockingp) {
|
|
if (clockingp->isDefault()) {
|
|
if (m_defaultClockingp) {
|
|
clockingp->v3error("Only one default clocking block allowed per module"
|
|
" (IEEE 1800-2023 14.12)");
|
|
}
|
|
m_defaultClockingp = clockingp;
|
|
}
|
|
});
|
|
m_modp = nodep;
|
|
iterateChildren(nodep);
|
|
}
|
|
void visit(AstProperty* nodep) override {
|
|
// The body will be visited when will be substituted in place of property reference
|
|
// (AstFuncRef)
|
|
VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
|
|
}
|
|
void visit(AstNode* nodep) override { iterateChildren(nodep); }
|
|
|
|
public:
|
|
// CONSTRUCTORS
|
|
explicit AssertPreVisitor(AstNetlist* nodep)
|
|
: m_netlistp{nodep} {
|
|
clearAssertInfo();
|
|
// Process
|
|
iterate(nodep);
|
|
// Fix up varref names
|
|
for (AstVarXRef* xrefp : m_xrefsp) xrefp->name(xrefp->varp()->name());
|
|
}
|
|
~AssertPreVisitor() override = default;
|
|
};
|
|
|
|
//######################################################################
|
|
// Top Assert class
|
|
|
|
void V3AssertPre::assertPreAll(AstNetlist* nodep) {
|
|
UINFO(2, __FUNCTION__ << ": " << endl);
|
|
{ AssertPreVisitor{nodep}; } // Destruct before checking
|
|
V3Global::dumpCheckGlobalTree("assertpre", 0, dumpTreeEitherLevel() >= 3);
|
|
}
|