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40 lines
926 B
Systemverilog
40 lines
926 B
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// Copyright 2024 by Antmicro. This program is free software; you can
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// redistribute it and/or modify it under the terms of either the GNU
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// Lesser General Public License Version 3 or the Perl Artistic License
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// Version 2.0.
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// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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module t (/*AUTOARG*/
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// Inputs
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clk
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);
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input clk;
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integer counter = 0;
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import "DPI-C" context function int dpii_increment(inout int counter);
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function void func();
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endfunction : func
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always @(posedge clk) begin
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if(dpii_increment(counter) == 1) begin
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// unreachable
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func();
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// add impure statement for splitting
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$write("");
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end
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else if (counter == 1) begin
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$write("*-* All Finished *-*\n");
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$finish;
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end
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else begin
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$write("DPI called too many times: %d\n", counter);
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$stop;
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end
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end
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endmodule
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