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132 lines
3.1 KiB
Verilog
132 lines
3.1 KiB
Verilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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//
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2004-2007 by Wilson Snyder.
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//===========================================================================
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// Includes
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`include "t_preproc_inc2.v"
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//===========================================================================
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// Comments
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/* verilator pass_thru comment */
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// verilator pass_thru_comment2
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//===========================================================================
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// Defines
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`define DEF_A3
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`define DEF_A1
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// DEF_A0 set by command line
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wire [3:0] q = {
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`ifdef DEF_A3 1'b1 `else 1'b0 `endif ,
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`ifdef DEF_A2 1'b1 `else 1'b0 `endif ,
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`ifdef DEF_A1 1'b1 `else 1'b0 `endif ,
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`ifdef DEF_A0 1'b1 `else 1'b0 `endif
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};
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text.
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`define FOOBAR foo /*but not */ bar /* or this either */
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`define FOOBAR2 foobar2 // but not
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`FOOBAR
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`FOOBAR2
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`define MULTILINE first part \
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second part \
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third part
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`define MOREMULTILINE {\
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a,\
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b,\
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c}
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/*******COMMENT*****/
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`MULTILINE
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Line_Preproc_Check `__LINE__
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//===========================================================================
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`define syn_negedge_reset_l or negedge reset_l
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`define DEEP deep
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`define DEEPER `DEEP `DEEP
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`DEEPER
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`define nosubst NOT_SUBSTITUTED
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`define WITHTICK "`nosubst"
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"Inside: `nosubst"
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`WITHTICK
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`define withparam(a, b) a b LLZZ a b
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`withparam(x,y)
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`withparam(`withparam(p,q),`withparam ( r , s ))
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`withparam(firstline
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,
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comma","line)
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`define withquote(a, bar) a bar LLZZ "a" bar
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`withquote( x , y)
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`define noparam (a,b)
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`noparam(a,b)
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`define msg(x,y) `"x: `\`"y`\`"`"
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$display(`msg(left side, right side))
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`define foo(f) f``_suffix
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`foo(bar)
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`define zap(which) \
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$c("Zap(\"",which,"\");");
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`zap(bug1);
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`zap("bug2");
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// rt.cpan.org bug34429
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`define ADD_UP(a,c) \
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wire tmp_``a = a; \
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wire tmp_``c = tmp_``a + 1; \
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assign c = tmp_``c ;
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`ADD_UP(d1,o1) // expansion is OK
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`ADD_UP( d2 , o2 ) // expansion is bad
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`define check(mod, width, flopname, gate, path) \
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generate for (i=0; i<(width); i=i+1) begin \
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psl cover { path.d[i] & ~path.q[i] & !path.cond & (gate)} report `"fondNoRise: mod.flopname`"; \
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psl cover { ~path.d[i] & path.q[i] & !path.cond & (gate)} report `"fondNoFall: mod.flopname`"; \
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end endgenerate
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// parameterized macro with arguments that are macros
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`define MK m5k.f
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`define MF `MK .ctl
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`define CK_fr (`MF.alive & `MF.alive_m1)
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`check(m5kc_fcl, 3, _ctl_mvldx_m1, `CK_fr, `MF._ctl_mvldx_m1) // ignorecmt
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// macro call with define that has comma
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`define REG_H 6
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`define REG_L 7
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`define _H regs[`REG_H]
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`define _L regs[`REG_L]
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`define _HL {`_H, `_L}
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`define EX_WRITE(ad, da) begin addr <= (ad); wdata <= (da); wr <= 1; end
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`define EX_READ(ad) begin addr <= (ad); rd <= 1; end
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`EX_READ((`_HL + 1)) and `EX_WRITE((`_HL), rdata)
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`EX_READ(`_HL + 1)
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`EX_WRITE(`_HL, rdata)
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//===========================================================================
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// Ifdef
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`define EMPTY_TRUE
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`ifndef EMPTY_TRUE
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`error "Empty is still true"
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`endif
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Line_Preproc_Check `__LINE__
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