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175 lines
2.0 KiB
Plaintext
175 lines
2.0 KiB
Plaintext
$version Generated by VerilatedVcd $end
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$date Fri Jun 22 19:23:24 2018
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$end
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$timescale 1ns $end
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$scope module top $end
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$var wire 1 $ clk $end
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$var wire 1 % res $end
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$var wire 16 ' res16 [15:0] $end
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$var wire 8 & res8 [7:0] $end
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$scope module $unit $end
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$var wire 32 + ID_MSB [31:0] $end
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$upscope $end
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$scope module t $end
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$var wire 1 $ clk $end
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$var wire 8 ( clkSet [7:0] $end
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$var wire 1 $ clk_1 $end
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$var wire 3 ) clk_3 [2:0] $end
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$var wire 4 * clk_4 [3:0] $end
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$var wire 1 $ clk_final $end
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$var wire 8 # count [7:0] $end
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$var wire 1 % res $end
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$var wire 16 ' res16 [15:0] $end
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$var wire 8 & res8 [7:0] $end
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$upscope $end
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$upscope $end
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$enddefinitions $end
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#0
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b00000000 #
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0$
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0%
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b00000000 &
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b0000000000000000 '
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b00000000 (
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b000 )
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b0000 *
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b00000000000000000000000000000001 +
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#10
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b00000001 #
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1$
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1%
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b11101111 &
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b0000000111111111 '
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b11111111 (
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b111 )
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b1111 *
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#15
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b00000010 #
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0$
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0%
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b00000000 &
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b0000001000000000 '
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b00000000 (
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b000 )
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b0000 *
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#20
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b00000011 #
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1$
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1%
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b11101111 &
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b0000001111111111 '
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b11111111 (
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b111 )
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b1111 *
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#25
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b00000100 #
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0$
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0%
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b00000000 &
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b0000010000000000 '
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b00000000 (
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b000 )
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b0000 *
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#30
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b00000101 #
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1$
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1%
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b11101111 &
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b0000010111111111 '
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b11111111 (
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b111 )
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b1111 *
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#35
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b00000110 #
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0$
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0%
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b00000000 &
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b0000011000000000 '
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b00000000 (
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b000 )
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b0000 *
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#40
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b00000111 #
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1$
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1%
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b11101111 &
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b0000011111111111 '
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b11111111 (
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b111 )
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b1111 *
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#45
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b00001000 #
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0$
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0%
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b00000000 &
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b0000100000000000 '
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b00000000 (
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b000 )
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b0000 *
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#50
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b00001001 #
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1$
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1%
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b11101111 &
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b0000100111111111 '
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b11111111 (
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b111 )
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b1111 *
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#55
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b00001010 #
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0$
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0%
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b00000000 &
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b0000101000000000 '
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b00000000 (
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b000 )
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b0000 *
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#60
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b00001011 #
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1$
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1%
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b11101111 &
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b0000101111111111 '
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b11111111 (
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b111 )
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b1111 *
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#65
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b00001100 #
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0$
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0%
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b00000000 &
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b0000110000000000 '
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b00000000 (
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b000 )
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b0000 *
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#70
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b00001101 #
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1$
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1%
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b11101111 &
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b0000110111111111 '
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b11111111 (
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b111 )
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b1111 *
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#75
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b00001110 #
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0$
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0%
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b00000000 &
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b0000111000000000 '
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b00000000 (
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b000 )
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b0000 *
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#80
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b00001111 #
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1$
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1%
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b11101111 &
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b0000111111111111 '
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b11111111 (
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b111 )
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b1111 *
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