github/verilator
1
0
Fork 1
mirror of https://github.com/verilator/verilator.git synced 2025-02-07 22:21:52 +00:00
Code Issues Packages Projects Releases Wiki Activity
3,341 Commits 2 Branches 161 Tags 143 MiB
15b40a97d9
Commit Graph

4 Commits

Author SHA1 Message Date
Wilson Snyder
1ce360ed5b Add SPDX license identifiers. No functional change. 2020-03-21 11:24:24 -04:00
Wilson Snyder
384807ebbd Ignore SystemVerilog timeunit and timeprecision 2008-10-14 14:49:54 -04:00
Wilson Snyder
52912c6329 Convert repository to git from svn. 
- Change .cvsignore to .gitignore
- Remove Id metacomments
- Cleanup whitespace at end of lines
 2008-06-09 21:25:10 -04:00
Wilson Snyder
d2ce499b59 Support SystemVerilog .name and .* interconnect. 
git-svn-id: file://localhost/svn/verilator/trunk/verilator@906 77ca24e4-aefa-0310-84f0-b9a241c72d87
 2007-03-14 13:06:08 +00:00