github/verilator
1
0
Fork 1
mirror of https://github.com/verilator/verilator.git synced 2025-01-23 23:04:14 +00:00
Code Issues Packages Projects Releases Wiki Activity

Fix crash on undeclared packages.

Browse Source
This commit is contained in:
Wilson Snyder 2020-06-05 18:50:06 -04:00
parent 2590c9c4a6
commit ff41701ddc
4 changed files with 44 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
src/verilog.y
View File

@ -917,8 +917,14 @@ package_import_itemList<nodep>:
package_import_item<nodep>: // ==IEEE: package_import_item
idAny/*package_identifier*/ yP_COLONCOLON package_import_itemObj
{ $$ = new AstPackageImport($<fl>2, VN_CAST($<scp>1, Package), *$3);
SYMP->importItem($<scp>1,*$3); }
{
if (!VN_CAST($<scp>1, Package)) {
$$ = NULL;
$<fl>1->v3error("Importing from missing package '" << *$<strp>1 << "'");
} else {
$$ = new AstPackageImport($<fl>2, VN_CAST($<scp>1, Package), *$3);
SYMP->importItem($<scp>1,*$3);
} }
;
package_import_itemObj<strp>: // IEEE: part of package_import_item

7
test_regress/t/t_lint_import_name2_bad.out Normal file
View File

@ -0,0 +1,7 @@
%Error: t/t_lint_import_name2_bad.v:7:8: Importing from missing package 'missing'
7 | import missing::sigs;
| ^~~~~~~
%Error: t/t_lint_import_name2_bad.v:9:8: Importing from missing package 'missing'
9 | import missing::*;
| ^~~~~~~
%Error: Exiting due to

20
test_regress/t/t_lint_import_name2_bad.pl Executable file
View File

@ -0,0 +1,20 @@
#!/usr/bin/env perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2008 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
scenarios(vlt => 1);
lint(
verilator_flags2 => ["--lint-only -Wall -Wno-DECLFILENAME"],
fails => 1,
expect_filename => $Self->{golden_filename},
);
ok(1);
1;

9
test_regress/t/t_lint_import_name2_bad.v Normal file
View File

@ -0,0 +1,9 @@
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2018 by Wilson Snyder.
// SPDX-License-Identifier: CC0-1.0
import missing::sigs;
import missing::*;