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Fix insertion at queue's end (#4619)
Signed-off-by: Krzysztof Boronski <kboronski@antmicro.com> Co-authored-by: Wilson Snyder <wsnyder@wsnyder.org>
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@ -545,7 +545,7 @@ public:
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// function void q.insert(index, value);
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void insert(int32_t index, const T_Value& value) {
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if (VL_UNLIKELY(index < 0 || index >= m_deque.size())) return;
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if (VL_UNLIKELY(index < 0 || index > m_deque.size())) return;
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m_deque.insert(m_deque.begin() + index, value);
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}
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21
test_regress/t/t_queue_insert_at_end.pl
Executable file
21
test_regress/t/t_queue_insert_at_end.pl
Executable file
@ -0,0 +1,21 @@
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#!/usr/bin/env perl
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if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2023 by Wilson Snyder. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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scenarios(simulator => 1);
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compile(
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);
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execute(
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check_finished => 1,
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);
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ok(1);
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1;
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23
test_regress/t/t_queue_insert_at_end.v
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test_regress/t/t_queue_insert_at_end.v
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@ -0,0 +1,23 @@
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2023 by Antmicro Ltd.
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// SPDX-License-Identifier: CC0-1.0
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module t();
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initial begin
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int queue[$];
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queue.insert(0, 0);
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if (queue.size() != 1) $stop;
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queue.insert(1, 1);
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if (queue.size() != 2) $stop;
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if (queue[0] != 0) $stop;
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if (queue[1] != 1) $stop;
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$write("*-* All Finished *-*\n");
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$finish;
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end
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endmodule
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