Fix complex sensitivity, try 2

git-svn-id: file://localhost/svn/verilator/trunk/verilator@866 77ca24e4-aefa-0310-84f0-b9a241c72d87
This commit is contained in:
Wilson Snyder 2007-01-03 03:30:30 +00:00
parent 58dc91605b
commit c14818ebb3
2 changed files with 17 additions and 4 deletions

View File

@ -100,11 +100,23 @@ private:
virtual void visit(AstSenItem* nodep, AstNUser*) {
// Remove bit selects, and bark if it's not a simple variable
nodep->iterateChildren(*this);
while (AstNodeSel* selp = nodep->sensp()->castNodeSel()) {
AstNode* fromp = selp->fromp()->unlinkFrBack();
selp->replaceWith(fromp); selp->deleteTree(); selp=NULL;
bool did=1;
while (did) {
did=0;
if (AstNodeSel* selp = nodep->sensp()->castNodeSel()) {
AstNode* fromp = selp->fromp()->unlinkFrBack();
selp->replaceWith(fromp); selp->deleteTree(); selp=NULL;
did=1;
}
// NodeSel doesn't include AstSel....
if (AstSel* selp = nodep->sensp()->castSel()) {
AstNode* fromp = selp->fromp()->unlinkFrBack();
selp->replaceWith(fromp); selp->deleteTree(); selp=NULL;
did=1;
}
}
if (!nodep->sensp()->castNodeVarRef()) {
if (debug()) nodep->dumpTree(cout,"-tree: ");
nodep->v3error("Unsupported: Complex statement in sensitivity list");
}
}

View File

@ -29,7 +29,8 @@ module t (/*AUTOARG*/
reg [7:0] memory8_16_4;
reg [7:0] memory8_16_5;
always @ (memory8_16[4] or memory8_16[5]) begin
// Test complicated sensitivity lists
always @ (memory8_16[4][7:1] or memory8_16[5]) begin
memory8_16_4 = memory8_16[4];
memory8_16_5 = memory8_16[5];
end