Fix error on empty generate with -O0 (#5250).

This commit is contained in:
Wilson Snyder 2024-07-11 06:59:15 -04:00
parent 570e1bc35a
commit bbb223f217
4 changed files with 36 additions and 1 deletions

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@ -22,6 +22,7 @@ Verilator 5.027 devel
* Fix unknown conversion on queues (#5220). [Alex Solomatnikov]
* Fix top-level unpacked structure resets (#5221).
* Fix concurrency for mailbox and semaphores (#5222). [Liam Braun]
* Fix error on empty generate with -O0 (#5250).
Verilator 5.026 2024-06-15

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@ -356,7 +356,11 @@ class UnrollVisitor final : public VNVisitor {
}
}
if (!newbodysp) { // initp might have effects after the loop
newbodysp = initp; // Maybe nullptr
if (m_generate && initp) { // GENFOR(ASSIGN(...)) need to move under a new Initial
newbodysp = new AstInitial{initp->fileline(), initp};
} else {
newbodysp = initp; // Maybe nullptr
}
initp = nullptr;
}
// Replace the FOR()

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@ -0,0 +1,20 @@
#!/usr/bin/env perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2024 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
scenarios(vlt => 1);
compile(
verilator_flags2 => ['-O0'],
make_main => 0,
verilator_make_gmake => 0,
);
ok(1);
1;

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@ -0,0 +1,10 @@
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2024 by Wilson Snyder.
// SPDX-License-Identifier: CC0-1.0
module t(/*AUTOARG*/);
genvar i;
for (i = 0; i < 0; i = i + 1) begin end
endmodule