Fix false ENUMVALUE on expressions and arrays.

Changes

@@ -21,6 +21,7 @@ Verilator 5.009 devel
 * Fix UNDRIVEN warning seg fault (#3989). [Felix Neumärker]
 * Fix symbol entries when inheriting classes (#3995) (#3996). [Krzysztof Bieganski, Antmicro Ltd]
 * Fix push to dynamic queue in struct (#4015). [ezchi]
+* Fix false ENUMVALUE on expressions and arrays.
 
 
 Verilator 5.008 2023-03-04

src/V3Ast.cpp

@@ -1342,7 +1342,9 @@ void AstNode::dtypeChgWidthSigned(int width, int widthMin, VSigning numeric) {
         dtypeSetLogicUnsized(width, widthMin, numeric);
     } else {
         if (width == dtypep()->width() && widthMin == dtypep()->widthMin()
-            && numeric == dtypep()->numeric())
+            && numeric == dtypep()->numeric()
+            // Enums need to become direct sizes to avoid later ENUMVALUE errors
+            && !VN_IS(dtypep()->skipRefToEnump(), EnumDType))
             return;  // Correct already
         // FUTURE: We may be pointing at a two state data type, and this may
         // convert it to logic.  Since the AstVar remains correct, we

test_regress/t/t_0.pl

@@ -0,0 +1,21 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;

test_regress/t/t_0.v

@@ -0,0 +1,21 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2009 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t (/*AUTOARG*/);
+
+   enum int unsigned {
+      FIVE_INT = 5
+   } FI;
+
+   int array5i[FIVE_INT];
+
+   initial begin
+      if ($size(array5i) != 5) $stop;
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+
+endmodule

test_regress/t/t_enum.v

@@ -31,10 +31,17 @@ module t (/*AUTOARG*/);
          z5 = e5
          } ZN;
 
+   enum int unsigned {
+      FIVE_INT = 5
+   } FI;
+
    typedef enum three_t;  // Forward
    typedef enum [2:0] { ONES=~0 } three_t;
    three_t three = ONES;
 
+   int array5[z5];
+   int array5i[FIVE_INT];
+
    var logic [ONES:0] sized_based_on_enum;
 
    var enum logic [3:0]  { QINVALID='1, QSEND={2'b0,2'h0}, QOP={2'b0,2'h1}, QCL={2'b0,2'h2},
@@ -76,6 +83,9 @@ module t (/*AUTOARG*/);
       if (QACK     !=  4) $stop;
       if (QRSP     !=  5) $stop;
 
+      if ($size(array5) != 5) $stop;
+      if ($size(array5i) != 5) $stop;
+
       $write("*-* All Finished *-*\n");
       $finish;
    end