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Tests: Close misc internal code coverage holes

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This commit is contained in:
Wilson Snyder 2024-07-28 14:18:24 -04:00
parent 167cba723e
commit 8707c88787
34 changed files with 334 additions and 37 deletions
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2
.github/workflows/coverage.yml vendored
View File

@ -102,4 +102,4 @@ jobs:
CODECOV_TOKEN: ${{ secrets.CODECOV_TOKEN }}
run: |
find . -name '*.gcno' -exec rm {} \;
./ci/codecov -v do-upload -Z --sha ${{ github.sha }} -f nodist/obj_dir/coverage/app_total.info
./ci/codecov -v upload-process -Z --sha ${{ github.sha }} -f nodist/obj_dir/coverage/app_total.info

11
nodist/code_coverage
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@ -262,12 +262,21 @@ def cleanup_abs_paths_info(cc_dir, infile, outfile):
lines = []
with open(infile, "r", encoding="utf8") as fh:
for line in fh:
if re.search(r'^SF:', line):
if re.search(r'^SF:', line) and not re.search(r'^SF:/usr/', line):
line = re.sub(os.environ['VERILATOR_ROOT'] + '/',
'',
line,
count=1)
line = re.sub(cc_dir + '/', '', line, count=1)
line = re.sub(r'^SF:.*?/include/',
'SF:include/',
line,
count=1)
line = re.sub(r'^SF:.*?/src/', 'SF:src/', line, count=1)
line = re.sub(r'^SF:.*?/test_regress/',
'SF:test_regress/',
line,
count=1)
line = re.sub(r'obj_dbg/verilog.y$', 'verilog.y', line)
# print("Remaining SF: "+line)
lines.append(line)

2
src/V3EmitCFunc.cpp
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@ -768,7 +768,7 @@ string EmitCFunc::emitVarResetRecurse(const AstVar* varp, const string& varNameP
}
return out;
}
} else {
} else { // LCOV_EXCL_BR_LINE
v3fatalSrc("Unknown node type in reset generator: " << varp->prettyTypeName());
}
return "";

6
src/V3EmitCFunc.h
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@ -1481,15 +1481,13 @@ public:
}
// Default
void visit(AstNode* nodep) override {
void visit(AstNode* nodep) override { // LCOV_EXCL_START
putns(nodep, "\n???? // "s + nodep->prettyTypeName() + "\n");
iterateChildrenConst(nodep);
// LCOV_EXCL_START
if (!v3Global.opt.lintOnly()) { // An internal problem, so suppress
nodep->v3fatalSrc("Unknown node type reached emitter: " << nodep->prettyTypeName());
}
// LCOV_EXCL_STOP
}
} // LCOV_EXCL_STOP
EmitCFunc()
: m_lazyDecls(*this) {}

10
src/V3Number.cpp
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@ -1202,16 +1202,6 @@ V3Number& V3Number::opBitsZ(const V3Number& lhs) { // 0/1->1, X/Z->0
}
return *this;
}
V3Number& V3Number::opBitsNonZ(const V3Number& lhs) { // 0/1->1, X/Z->0
// op i, L(lhs) bit return
NUM_ASSERT_OP_ARGS1(lhs);
NUM_ASSERT_LOGIC_ARGS1(lhs);
setZero();
for (int bit = 0; bit < width(); bit++) {
if (!lhs.bitIsZ(bit)) setBit(bit, 1);
}
return *this;
}
//======================================================================
// Operators - Simple per-bit logical ops

1
src/V3Number.h
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@ -670,7 +670,6 @@ public:
V3Number& opBitsOne(const V3Number& lhs); // 1->1, 0/X/Z->0
V3Number& opBitsXZ(const V3Number& lhs); // 0/1->0, X/Z->1
V3Number& opBitsZ(const V3Number& lhs); // Z->1, 0/1/X->0
V3Number& opBitsNonZ(const V3Number& lhs); // Z->0, 0/1/X->1
//
V3Number& opAssign(const V3Number& lhs);
V3Number& opAssignNonXZ(const V3Number& lhs, bool ignoreXZ = true);

4
src/V3Options.cpp
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@ -707,9 +707,9 @@ string V3Options::getenvSYSTEMC_ARCH() {
uname(&uts);
const string sysname = VString::downcase(uts.sysname); // aka 'uname -s'
if (VL_UNCOVERABLE(VString::wildmatch(sysname.c_str(), "*solaris*"))) {
var = "gccsparcOS5";
var = "gccsparcOS5"; // LCOV_EXCL_LINE
} else if (VL_UNCOVERABLE(VString::wildmatch(sysname.c_str(), "*cygwin*"))) {
var = "cygwin";
var = "cygwin"; // LCOV_EXCL_LINE
} else {
var = "linux";
}

8
src/V3ParseImp.cpp
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@ -404,9 +404,9 @@ size_t V3ParseImp::tokenPipeScanParam(size_t depth) {
int parens = 1; // Count first (
while (true) {
const int tok = tokenPeekp(depth)->token;
if (tok == 0) {
if (tok == 0) { // LCOV_EXCL_BR_LINE
UINFO(9, "tokenPipeScanParam hit EOF; probably syntax error to come");
break;
break; // LCOV_EXCL_LINE
} else if (tok == '(') {
++parens;
} else if (tok == ')') {
@ -430,9 +430,9 @@ size_t V3ParseImp::tokenPipeScanType(size_t depth) {
int parens = 1; // Count first (
while (true) {
const int tok = tokenPeekp(depth)->token;
if (tok == 0) {
if (tok == 0) { // LCOV_EXCL_BR_LINE
UINFO(9, "tokenPipeScanType hit EOF; probably syntax error to come");
break;
break; // LCOV_EXCL_LINE
} else if (tok == '(') {
++parens;
} else if (tok == ')') {

4
src/V3PreProc.cpp
View File

@ -1254,10 +1254,10 @@ int V3PreProcImp::getStateToken() {
static string newlines;
newlines = "\n"; // Always start with trailing return
if (tok == VP_DEFVALUE) {
if (debug() >= 5) {
if (debug() >= 5) { // LCOV_EXCL_START
cout << "DefValue='" << V3PreLex::cleanDbgStrg(m_lexp->m_defValue)
<< "' formals='" << V3PreLex::cleanDbgStrg(m_formals) << "'\n";
}
} // LCOV_EXCL_STOP
// Add any formals
const string formals = m_formals;
string value = m_lexp->m_defValue;

4
src/V3Simulate.h
View File

@ -183,11 +183,11 @@ public:
// and fetchConst should not be called or it may assert.
if (!m_whyNotNodep) {
m_whyNotNodep = nodep;
if (debug() >= 5) {
if (debug() >= 5) { // LCOV_EXCL_START
UINFO(0, "Clear optimizable: " << why);
if (nodep) std::cout << ": " << nodep;
std::cout << std::endl;
}
} // LCOV_EXCL_STOP
m_whyNotOptimizable = why;
std::ostringstream stack;
for (const auto& callstack : vlstd::reverse_view(m_callStack)) {

5
src/V3SymTable.h
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@ -121,11 +121,12 @@ public:
UINFO(9, " SymInsert se" << cvtToHex(this) << " '" << name << "' se" << cvtToHex(entp)
<< " " << entp->nodep() << endl);
if (name != "" && m_idNameMap.find(name) != m_idNameMap.end()) {
if (!V3Error::errorCount()) { // Else may have just reported warning
// If didn't already report warning
if (!V3Error::errorCount()) { // LCOV_EXCL_START
if (debug() >= 9 || V3Error::debugDefault())
dumpSelf(std::cout, "- err-dump: ", 1);
entp->nodep()->v3fatalSrc("Inserting two symbols with same name: " << name);
}
} // LCOV_EXCL_STOP
} else {
m_idNameMap.emplace(name, entp);
}

2
src/V3Task.cpp
View File

@ -1020,7 +1020,7 @@ class TaskVisitor final : public VNVisitor {
portp->v3warn(
E_UNSUPPORTED,
"Unsupported: DPI argument of type "
<< portp->basicp()->prettyTypeName() << '\n'
<< portp->dtypep()->prettyTypeName() << '\n'
<< portp->warnMore()
<< "... For best portability, use bit, byte, int, or longint");
// We don't warn on logic either, although the 4-stateness is lost.

19
test_regress/t/t_debug_gate.pl Executable file
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@ -0,0 +1,19 @@
#!/usr/bin/env perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
scenarios(vlt => 1);
compile(
# Check we can call dump() on graph, and other things
v_flags => ["--debug --debugi 0 --debugi-V3Graph 9"],
);
ok(1);
1;

28
test_regress/t/t_debug_gate.v Normal file
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@ -0,0 +1,28 @@
// DESCRIPTION: Verilator: Dotted reference that uses another dotted reference
// as the select expression
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2024 by Wilson Snyder.
// SPDX-License-Identifier: CC0-1.0
module t (/*AUTOARG*/
// Outputs
o,
// Inputs
i
);
input i;
output o;
sub sub (.i, .o);
endmodule
module sub(/*AUTOARG*/
// Outputs
o,
// Inputs
i
);
input i;
output o;
assign o = !i;
endmodule

19
test_regress/t/t_debug_trace.pl Executable file
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@ -0,0 +1,19 @@
#!/usr/bin/env perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
scenarios(vlt => 1);
compile(
# Check we can call dump() on graph, and other things
v_flags => ["--trace --debug --debugi 0 --debugi-V3Trace 9"],
);
ok(1);
1;

18
test_regress/t/t_debug_trace.v Normal file
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@ -0,0 +1,18 @@
// DESCRIPTION: Verilator: Dotted reference that uses another dotted reference
// as the select expression
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2024 by Wilson Snyder.
// SPDX-License-Identifier: CC0-1.0
module t (/*AUTOARG*/
// Inputs
a
);
input a;
sub sub ();
endmodule
module sub;
reg svar;
endmodule

7
test_regress/t/t_display.out
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@ -88,11 +88,16 @@ multiline
log10(2) = 2
x
xxXa
XXX 1x5X
xxxX2
XXX
Zx5X
zx5X
x
z
X
Z
ZzX
ZzXx
XXXx
10
*-* All Finished *-*

7
test_regress/t/t_display.v
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@ -200,12 +200,17 @@ multiline", $time);
// unknown and high-impedance values
$display("%d", 1'bx);
$display("%h", 14'bx01010);
$display("%h %o", 12'b001xxx101x01, 12'b001xxx101x01);
$display("%o", 14'bx01010);
$display("%h", 12'b001x_xx10_1x01);
$display("%o", 12'bz01_xxx_101_x01);
$display("%o", 12'bzzz_xxx_101_x01);
$display("%d", 32'bx);
$display("%d", 32'bz);
$display("%d", 32'b11x11z111);
$display("%d", 32'b11111z111);
$display("%h", 12'b1zz1_zzzz_1x1z);
$display("%o", 12'b1zz_zzz_x1x_xxx);
$display("%o", 12'b1zx_zzx_x1z_xxx);
$display(,, 10); // Strange but legal

7
test_regress/t/t_dpi_argtype_bad.out Normal file
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@ -0,0 +1,7 @@
%Error-UNSUPPORTED: t/t_dpi_argtype_bad.v:13:41: Unsupported: DPI argument of type REFDTYPE 'foo_t'
: ... For best portability, use bit, byte, int, or longint
13 | import "DPI-C" task dpix_twice(foo_t arg);
| ^~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: Verilator internal fault, sorry. Suggest trying --debug --gdbbt
%Error: Command Failed

19
test_regress/t/t_dpi_argtype_bad.pl Executable file
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@ -0,0 +1,19 @@
#!/usr/bin/env perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
scenarios(linter => 1);
lint(
fails => $Self->{vlt_all},
expect_filename => $Self->{golden_filename},
);
ok(1);
1;

17
test_regress/t/t_dpi_argtype_bad.v Normal file
View File

@ -0,0 +1,17 @@
// DESCRIPTION: Verilator: Verilog Test module
//
// Copyright 2021 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License
// Version 2.0.
// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
module t;
typedef struct { string a; string b; } foo_t;
import "DPI-C" task dpix_twice(foo_t arg);
initial begin
$stop;
end
endmodule

5
test_regress/t/t_enum_public.v
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@ -19,6 +19,11 @@ package p62;
ALLONE = '1 } e62_t /*verilator public*/;
endpackage
package pw;
typedef enum logic [99:0] { // Too wide for public
WIDE = 100'h123} ewide_t /*verilator public*/;
endpackage
module t (/*AUTOARG*/);
enum integer {

21
test_regress/t/t_langext_2012ext.pl Executable file
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@ -0,0 +1,21 @@
#!/usr/bin/env perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
scenarios(simulator => 1);
top_filename("t/t_langext_2.v");
# This is a compile only test.
compile(
v_flags2 => ["+1800-2012ext+v"],
);
ok(1);
1;

21
test_regress/t/t_langext_2017ext.pl Executable file
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@ -0,0 +1,21 @@
#!/usr/bin/env perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
scenarios(simulator => 1);
top_filename("t/t_langext_2.v");
# This is a compile only test.
compile(
v_flags2 => ["+1800-2017ext+v"],
);
ok(1);
1;

21
test_regress/t/t_langext_2023ext.pl Executable file
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@ -0,0 +1,21 @@
#!/usr/bin/env perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
scenarios(simulator => 1);
top_filename("t/t_langext_2.v");
# This is a compile only test.
compile(
v_flags2 => ["+1800-2023ext+v"],
);
ok(1);
1;

31
test_regress/t/t_lint_pragma_protected_bad.out
View File

@ -47,7 +47,34 @@
%Warning-PROTECTED: t/t_lint_pragma_protected_bad.v:74:17: A '`pragma protected data_block' encrypted section was detected and will be skipped.
%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:75:1: BASE64 line too long in `pragma protect key_bloock/data_block
%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:75:1: BASE64 encoding length mismatch in `pragma protect key_bloock/data_block
%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:83:1: `pragma is missing a pragma_expression.
83 | `pragma
%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:77:17: Multiple `pragma protected encoding sections
77 | `pragma protect encoding = (enctype = "UUENCODE", line_length = 1, bytes = 4)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
%Error-UNSUPPORTED: t/t_lint_pragma_protected_bad.v:77:17: Unsupported: only BASE64 is recognized for `pragma protected encoding
77 | `pragma protect encoding = (enctype = "UUENCODE", line_length = 1, bytes = 4)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
%Warning-PROTECTED: t/t_lint_pragma_protected_bad.v:79:17: A '`pragma protected data_block' encrypted section was detected and will be skipped.
%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:80:1: BASE64 line too long in `pragma protect key_bloock/data_block
%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:80:1: BASE64 encoding length mismatch in `pragma protect key_bloock/data_block
%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:81:17: Multiple `pragma protected encoding sections
81 | `pragma protect encoding = (enctype = "QUOTED-PRINTABLE", line_length = 1, bytes = 4)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:81:17: Illegal encoding type for `pragma protected encoding
81 | `pragma protect encoding = (enctype = "QUOTED-PRINTABLE", line_length = 1, bytes = 4)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
%Error-UNSUPPORTED: t/t_lint_pragma_protected_bad.v:81:17: Unsupported: only BASE64 is recognized for `pragma protected encoding
81 | `pragma protect encoding = (enctype = "QUOTED-PRINTABLE", line_length = 1, bytes = 4)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
%Warning-PROTECTED: t/t_lint_pragma_protected_bad.v:83:17: A '`pragma protected data_block' encrypted section was detected and will be skipped.
%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:84:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block
%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:84:1: BASE64 encoding length mismatch in `pragma protect key_bloock/data_block
%Error-UNSUPPORTED: t/t_lint_pragma_protected_bad.v:85:17: Unsupported: only BASE64 is recognized for `pragma protected encoding
85 | `pragma protect encoding = (enctype = "RAW", line_length = 1, bytes = 4)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
%Warning-PROTECTED: t/t_lint_pragma_protected_bad.v:87:17: A '`pragma protected data_block' encrypted section was detected and will be skipped.
%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:88:1: BASE64 line too long in `pragma protect key_bloock/data_block
%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:88:1: BASE64 encoding length mismatch in `pragma protect key_bloock/data_block
%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:96:1: `pragma is missing a pragma_expression.
96 | `pragma
| ^~~~~~~
%Error: Exiting due to

13
test_regress/t/t_lint_pragma_protected_bad.v
View File

@ -74,6 +74,19 @@ aW5pdGlvbnMuCgogIEFzIHVzZWQgaGVyZWluLCAidGhpcyBMaWNlbnNlIiByZWZlcnMgdG8gdmVyTOOL
aW5p
`pragma protect encoding = (enctype = "UUENCODE", line_length = 1, bytes = 4)
`pragma protect data_block
aW5p
`pragma protect encoding = (enctype = "QUOTED-PRINTABLE", line_length = 1, bytes = 4)
`pragma protect data_block
aW5p
`pragma protect encoding = (enctype = "RAW", line_length = 1, bytes = 4)
`pragma protect data_block
aW5p
`pragma protect end_protected
// Should trigger unknown pragma warning, although in principle unknown pragmas should be safely ignored.

3
test_regress/t/t_pp_underline_bad.out
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@ -1,6 +1,9 @@
%Error: t/t_pp_underline_bad.v:8:4: Extra underscore in meta-comment; use /*verilator {...}*/ not /*verilator_{...}*/
8 | // verilator_no_inline_module
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
%Error: t/t_pp_underline_bad.v:10:19: Extra underscore in meta-comment; use /*synopsys {...}*/ not /*synopsys_{...}*/
10 | case (1'b1) // synopsys_full_case
| ^~~~~~~~~~~~~~~~~~~~~
%Error: t/t_pp_underline_bad.v:8:4: Unknown verilator comment: '/*verilator _no_inline_module*/'
8 | /*verilator _no_inline_module*/
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

7
test_regress/t/t_pp_underline_bad.v
View File

@ -6,5 +6,10 @@
module t;
// verilator_no_inline_module
initial $stop; // Should have failed
initial begin
case (1'b1) // synopsys_full_case
endcase
$stop; // Should have failed
end
endmodule

6
test_regress/t/t_udp.v
View File

@ -108,7 +108,11 @@ primitive udp_mux2 (z, a, b, sel);
1 ? 0 : 1 ;
0 ? 0 : 0 ;
1 1 x : 1 ;
0 0 x : 0 ;
// Next blank line is intentional for parser
// Next \ at EOL is intentional for parser
0 0 x \
: 0 ;
endtable
endprimitive

2
test_regress/t/t_vams_basic.v
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@ -27,6 +27,8 @@ module t (/*AUTOARG*/
sub sub (.*);
initial begin
check(`__LINE__, asin(0.5) , 0.523599);
check(`__LINE__, asinh(0.5) , 0.481212);
check(`__LINE__, atan(0.5) , 0.463648);
check(`__LINE__, atan2(0.5, 0.3) , 1.03038);
check(`__LINE__, atanh(0.5) , 0.549306);

8
test_regress/t/t_wire_triand.out Normal file
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@ -0,0 +1,8 @@
%Error-UNSUPPORTED: t/t_wire_triand.v:11:4: Unsupported: triand
11 | triand ta;
| ^~~~~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error-UNSUPPORTED: t/t_wire_triand.v:12:4: Unsupported: trior
12 | trior to;
| ^~~~~
%Error: Exiting due to

19
test_regress/t/t_wire_triand.pl Executable file
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@ -0,0 +1,19 @@
#!/usr/bin/env perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
scenarios(linter => 1);
lint(
fails => $Self->{vlt_all},
expect_filename => $Self->{golden_filename},
);
ok(1);
1;

14
test_regress/t/t_wire_triand.v Normal file
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@ -0,0 +1,14 @@
// DESCRIPTION: Verilator: Verilog Test module for SystemVerilog 'alias'
//
// Simple bi-directional alias test.
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2024 by Wilson Snyder.
// SPDX-License-Identifier: CC0-1.0
module t (/*AUTOARG*/);
triand ta;
trior to;
endmodule