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README.rst
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README.rst
@ -21,7 +21,7 @@ Welcome to Verilator
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.. list-table::
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.. list-table::
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* - **Welcome to Verilator, the fastest Verilog/SystemVerilog simulator.**
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* - **Welcome to Verilator, the fastest Verilog/SystemVerilog simulator.**
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* Accepts synthesizable Verilog or SystemVerilog
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* Accepts Verilog or SystemVerilog
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* Performs lint code-quality checks
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* Performs lint code-quality checks
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* Compiles into multithreaded C++, or SystemC
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* Compiles into multithreaded C++, or SystemC
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* Creates XML to front-end your own tools
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* Creates XML to front-end your own tools
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@ -57,17 +57,18 @@ files, the "Verilated" code.
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The user writes a little C++/SystemC wrapper file, which instantiates the
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The user writes a little C++/SystemC wrapper file, which instantiates the
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"Verilated" model of the user's top level module. These C++/SystemC files
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"Verilated" model of the user's top level module. These C++/SystemC files
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are then compiled by a C++ compiler (gcc/clang/MSVC++). The resulting
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are then compiled by a C++ compiler (gcc/clang/MSVC++). Executing the
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executable performs the design simulation. Verilator also supports linking
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resulting executable performs the design simulation. Verilator also
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its generated libraries, optionally encrypted, into other simulators.
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supports linking Verilated generated libraries, optionally encrypted, into
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other simulators.
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Verilator may not be the best choice if you are expecting a full featured
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Verilator may not be the best choice if you are expecting a full featured
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replacement for NC-Verilog, VCS or another commercial Verilog simulator, or
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replacement for Incisive, ModelSim/Questa, VCS or another commercial
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if you are looking for a behavioral Verilog simulator e.g. for a quick
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Verilog simulator, or if you are looking for a behavioral Verilog simulator
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class project (we recommend `Icarus Verilog`_ for this.) However, if you
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e.g. for a quick class project (we recommend `Icarus Verilog`_ for this.)
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are looking for a path to migrate SystemVerilog to C++ or SystemC, or your
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However, if you are looking for a path to migrate SystemVerilog to C++ or
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team is comfortable writing just a touch of C++ code, Verilator is the tool
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SystemC, or your team is comfortable writing just a touch of C++ code,
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for you.
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Verilator is the tool for you.
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Performance
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Performance
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