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[Vpi] Fix missing scopes 2 (#4965)
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28718f964a
commit
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@ -858,13 +858,42 @@ public:
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void dumpJson(std::ostream& str) const override;
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// ACCESSORS
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string name() const override VL_MT_STABLE { return m_name; } // * = Cell name
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bool maybePointedTo() const override { return true; }
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string origModName() const { return m_origModName; } // * = modp()->origName() before inlining
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void name(const string& name) override { m_name = name; }
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void scopep(AstScope* scp) { m_scopep = scp; }
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AstScope* scopep() const { return m_scopep; }
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void timeunit(const VTimescale& flag) { m_timeunit = flag; }
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VTimescale timeunit() const { return m_timeunit; }
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};
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class AstCellInlineScope final : public AstNode {
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// A particular scoped usage of a Cell Inline
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// Parents: Scope
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// Children: none
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//
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// @astgen ptr := m_scopep : Optional[AstScope] // Scope variable is underneath
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// @astgen ptr := m_cellp : Optional[AstCellInline] // Cell ref
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const string m_origModName; // Original name of module, ignoring name() changes, for LinkDot
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public:
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AstCellInlineScope(FileLine* fl, AstScope* scopep, AstCellInline* cellp)
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: ASTGEN_SUPER_CellInlineScope(fl)
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, m_scopep{scopep}
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, m_cellp{cellp} {
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UASSERT_OBJ(scopep, fl, "Scope must be non-null");
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UASSERT_OBJ(cellp, fl, "CellInline must be non-null");
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}
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ASTGEN_MEMBERS_AstCellInlineScope;
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void dump(std::ostream& str) const override;
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void dumpJson(std::ostream& str) const override;
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// ACCESSORS
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string name() const override VL_MT_STABLE { return m_cellp->name(); }
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bool maybePointedTo() const override { return true; }
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AstScope* scopep() const VL_MT_STABLE { return m_scopep; } // Pointer to scope it's under
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string origModName() const {
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return m_cellp->origModName();
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} // * = modp()->origName() before inlining
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void scopep(AstScope* nodep) { m_scopep = nodep; }
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};
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class AstClassExtends final : public AstNode {
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// class extends class name, or class implements class name
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// Children: List of AstParseRef for packages/classes
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@ -1460,6 +1489,7 @@ class AstScope final : public AstNode {
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// Children: NODEBLOCK
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// @astgen op1 := varsp : List[AstVarScope]
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// @astgen op2 := blocksp : List[AstNode] // Logic blocks/AstActive/AstCFunc
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// @astgen op3 := inlinesp : List[AstCellInlineScope] // Cell Inlines
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//
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// Below scope and cell are nullptr if top scope
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// @astgen ptr := m_aboveScopep : Optional[AstScope] // Scope above this one in the hierarchy
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@ -1503,12 +1503,20 @@ void AstCell::dumpJson(std::ostream& str) const {
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void AstCellInline::dump(std::ostream& str) const {
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this->AstNode::dump(str);
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str << " -> " << origModName();
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str << " [scopep=" << nodeAddr(scopep()) << "]";
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}
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void AstCellInline::dumpJson(std::ostream& str) const {
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dumpJsonStrFunc(str, origModName);
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dumpJsonGen(str);
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}
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void AstCellInlineScope::dump(std::ostream& str) const {
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this->AstNode::dump(str);
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str << " -> " << origModName();
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str << " [scopep=" << nodeAddr(scopep()) << "]";
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}
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void AstCellInlineScope::dumpJson(std::ostream& str) const {
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dumpJsonStrFunc(str, origModName);
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dumpJsonGen(str);
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}
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bool AstClass::isCacheableChild(const AstNode* nodep) {
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return (VN_IS(nodep, Var) || VN_IS(nodep, Constraint) || VN_IS(nodep, EnumItemRef)
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|| (VN_IS(nodep, NodeFTask) && !VN_AS(nodep, NodeFTask)->isExternProto())
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@ -316,7 +316,7 @@ class EmitCSyms final : EmitCBaseVisitorConst {
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iterateChildrenConst(nodep);
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}
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}
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void visit(AstCellInline* nodep) override {
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void visit(AstCellInlineScope* nodep) override {
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if (v3Global.opt.vpi()) {
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const string type
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= (nodep->origModName() == "__BEGIN__") ? "SCOPE_OTHER" : "SCOPE_MODULE";
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@ -342,6 +342,7 @@ class EmitCSyms final : EmitCBaseVisitorConst {
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scopeSymString(nodep->name()),
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ScopeData{nodep, scopeSymString(nodep->name()), name_pretty, timeunit, type});
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}
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iterateChildrenConst(nodep);
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}
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void visit(AstScopeName* nodep) override {
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const string name = nodep->scopeSymName();
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@ -465,10 +465,8 @@ class HasherVisitor final : public VNVisitorConst {
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});
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}
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void visit(AstCellInline* nodep) override {
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m_hash += hashNodeAndIterate(nodep, HASH_DTYPE, HASH_CHILDREN, [this, nodep]() {
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m_hash += nodep->name();
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iterateConstNull(nodep->scopep());
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});
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m_hash += hashNodeAndIterate(nodep, HASH_DTYPE, HASH_CHILDREN,
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[this, nodep]() { m_hash += nodep->name(); });
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}
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void visit(AstNodeFTask* nodep) override {
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m_hash += hashNodeAndIterate(nodep, HASH_DTYPE, HASH_CHILDREN, [this, nodep]() { //
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@ -178,7 +178,9 @@ class ScopeVisitor final : public VNVisitor {
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}
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}
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void visit(AstCellInline* nodep) override { //
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nodep->scopep(m_scopep);
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if (v3Global.opt.vpi()) {
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m_scopep->addInlinesp(new AstCellInlineScope{nodep->fileline(), m_scopep, nodep});
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}
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}
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void visit(AstActive* nodep) override { // LCOV_EXCL_LINE
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nodep->v3fatalSrc("Actives now made after scoping");
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@ -1286,6 +1286,10 @@ sub compile {
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}
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if ($param{make_pli}) {
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# if make_pli is a string and not one
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if ($param{make_pli} ne "1") {
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$self->{pli_filename} = $param{make_pli};
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}
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$self->oprint("Compile vpi\n") if $self->{verbose};
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my @cmd = ($ENV{CXX}, @{$param{pli_flags}},
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"-D" . $param{tool_define},
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@ -53,7 +53,7 @@
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"modulep": [
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{"type":"MODULE","name":"@CONST-POOL@","addr":"(EB)","loc":"a,0:0,0:0","origName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
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"stmtsp": [
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{"type":"SCOPE","name":"@CONST-POOL@","addr":"(FB)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(EB)","varsp": [],"blocksp": []}
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{"type":"SCOPE","name":"@CONST-POOL@","addr":"(FB)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(EB)","varsp": [],"blocksp": [],"inlinesp": []}
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],"activesp": []}
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]}
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]}
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@ -48,7 +48,7 @@
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"modulep": [
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{"type":"MODULE","name":"@CONST-POOL@","addr":"(BB)","loc":"a,0:0,0:0","origName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
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"stmtsp": [
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{"type":"SCOPE","name":"@CONST-POOL@","addr":"(CB)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(BB)","varsp": [],"blocksp": []}
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{"type":"SCOPE","name":"@CONST-POOL@","addr":"(CB)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(BB)","varsp": [],"blocksp": [],"inlinesp": []}
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],"activesp": []}
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]}
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]}
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@ -13,7 +13,7 @@
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{"type":"CELL","name":"$unit","addr":"(X)","loc":"a,0:0,0:0","origName":"__024unit","recursive":false,"modp":"(E)","pinsp": [],"paramsp": [],"rangep": [],"intfRefsp": []},
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{"type":"TOPSCOPE","name":"","addr":"(H)","loc":"d,11:8,11:9","senTreesp": [],
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"scopep": [
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{"type":"SCOPE","name":"TOP","addr":"(Y)","loc":"d,11:8,11:9","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(I)","varsp": [],"blocksp": []}
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{"type":"SCOPE","name":"TOP","addr":"(Y)","loc":"d,11:8,11:9","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(I)","varsp": [],"blocksp": [],"inlinesp": []}
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]},
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{"type":"CFUNC","name":"_eval_static","addr":"(Z)","loc":"a,0:0,0:0","slow":true,"isStatic":false,"dpiExportDispatcher":false,"dpiExportImpl":false,"dpiImportPrototype":false,"dpiImportWrapper":false,"dpiContext":false,"isConstructor":false,"isDestructor":false,"isVirtual":false,"isCoroutine":false,"needProcess":false,"scopep":"(Y)","argsp": [],"initsp": [],
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"stmtsp": [
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@ -2888,7 +2888,7 @@
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]}
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]}
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],"attrsp": []},
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{"type":"SCOPE","name":"$unit","addr":"(JQB)","loc":"a,0:0,0:0","aboveScopep":"(Y)","aboveCellp":"(X)","modp":"(E)","varsp": [],"blocksp": []},
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{"type":"SCOPE","name":"$unit","addr":"(JQB)","loc":"a,0:0,0:0","aboveScopep":"(Y)","aboveCellp":"(X)","modp":"(E)","varsp": [],"blocksp": [],"inlinesp": []},
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{"type":"CFUNC","name":"_ctor_var_reset","addr":"(KQB)","loc":"a,0:0,0:0","slow":true,"isStatic":false,"dpiExportDispatcher":false,"dpiExportImpl":false,"dpiImportPrototype":false,"dpiImportWrapper":false,"dpiContext":false,"isConstructor":false,"isDestructor":false,"isVirtual":false,"isCoroutine":false,"needProcess":false,"scopep":"UNLINKED","argsp": [],"initsp": [],
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"stmtsp": [
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{"type":"CRESET","name":"","addr":"(LQB)","loc":"d,17:12,17:16",
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@ -2992,7 +2992,7 @@
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"modulep": [
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{"type":"MODULE","name":"@CONST-POOL@","addr":"(VRB)","loc":"a,0:0,0:0","origName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
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"stmtsp": [
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{"type":"SCOPE","name":"TOP","addr":"(WRB)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(VRB)","varsp": [],"blocksp": []}
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{"type":"SCOPE","name":"TOP","addr":"(WRB)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(VRB)","varsp": [],"blocksp": [],"inlinesp": []}
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],"activesp": []}
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]}
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]}
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@ -95,7 +95,7 @@
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"modulep": [
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{"type":"MODULE","name":"@CONST-POOL@","addr":"(WB)","loc":"a,0:0,0:0","origName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
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"stmtsp": [
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{"type":"SCOPE","name":"@CONST-POOL@","addr":"(XB)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(WB)","varsp": [],"blocksp": []}
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{"type":"SCOPE","name":"@CONST-POOL@","addr":"(XB)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(WB)","varsp": [],"blocksp": [],"inlinesp": []}
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],"activesp": []}
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]}
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]}
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@ -133,7 +133,7 @@
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"lhsp": [
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{"type":"VARREF","name":"q","addr":"(AD)","loc":"d,53:13,53:14","dtypep":"(H)","access":"WR","varp":"(G)","varScopep":"(BB)","classOrPackagep":"UNLINKED"}
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],"timingControlp": [],"strengthSpecp": []}
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]}
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],"inlinesp": []}
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]}
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],"activesp": []}
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],"filesp": [],
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@ -148,7 +148,7 @@
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"modulep": [
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{"type":"MODULE","name":"@CONST-POOL@","addr":"(BD)","loc":"a,0:0,0:0","origName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
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"stmtsp": [
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{"type":"SCOPE","name":"@CONST-POOL@","addr":"(CD)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(BD)","varsp": [],"blocksp": []}
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{"type":"SCOPE","name":"@CONST-POOL@","addr":"(CD)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(BD)","varsp": [],"blocksp": [],"inlinesp": []}
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],"activesp": []}
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]}
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]}
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@ -28,7 +28,7 @@
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"lhsp": [
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{"type":"VARREF","name":"top.f.i_clk","addr":"(T)","loc":"d,7:24,7:29","dtypep":"(H)","access":"WR","varp":"(J)","varScopep":"(N)","classOrPackagep":"UNLINKED"}
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],"timingControlp": []}
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]}
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],"inlinesp": []}
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]}
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],"activesp": []}
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],"filesp": [],
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@ -41,7 +41,7 @@
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"modulep": [
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{"type":"MODULE","name":"@CONST-POOL@","addr":"(U)","loc":"a,0:0,0:0","origName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
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"stmtsp": [
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{"type":"SCOPE","name":"@CONST-POOL@","addr":"(V)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(U)","varsp": [],"blocksp": []}
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{"type":"SCOPE","name":"@CONST-POOL@","addr":"(V)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(U)","varsp": [],"blocksp": [],"inlinesp": []}
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],"activesp": []}
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]}
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]}
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@ -28,7 +28,7 @@
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"lhsp": [
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{"type":"VARREF","name":"top.f.i_clk","addr":"(T)","loc":"d,7:24,7:29","dtypep":"(H)","access":"WR","varp":"(J)","varScopep":"(N)","classOrPackagep":"UNLINKED"}
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],"timingControlp": []}
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]}
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],"inlinesp": []}
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]}
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],"activesp": []}
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],"filesp": [],
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@ -41,7 +41,7 @@
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"modulep": [
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{"type":"MODULE","name":"@CONST-POOL@","addr":"(U)","loc":"a,0:0,0:0","origName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
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"stmtsp": [
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{"type":"SCOPE","name":"@CONST-POOL@","addr":"(V)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(U)","varsp": [],"blocksp": []}
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{"type":"SCOPE","name":"@CONST-POOL@","addr":"(V)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(U)","varsp": [],"blocksp": [],"inlinesp": []}
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],"activesp": []}
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]}
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]}
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@ -288,7 +288,7 @@
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{"type":"VARREF","name":"o_b","addr":"(NF)","loc":"d,25:10,25:13","dtypep":"(K)","access":"WR","varp":"(L)","varScopep":"(U)","classOrPackagep":"UNLINKED"}
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],"timingControlp": []}
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]}
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]}
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],"inlinesp": []}
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]},
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{"type":"VAR","name":"__Vfunc_vlvbound_test.foo__0__Vfuncout","addr":"(AB)","loc":"d,15:34,15:37","dtypep":"(K)","origName":"__Vfunc_vlvbound_test__DOT__foo__0__Vfuncout","isSc":false,"isPrimaryIO":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isUsedClock":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"attrClocker":"UNKNOWN","lifetime":"NONE","varType":"BLOCKTEMP","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
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{"type":"VAR","name":"__Vfunc_vlvbound_test.foo__0__val","addr":"(CB)","loc":"d,15:57,15:60","dtypep":"(H)","origName":"__Vfunc_vlvbound_test__DOT__foo__0__val","isSc":false,"isPrimaryIO":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isUsedClock":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"attrClocker":"UNKNOWN","lifetime":"NONE","varType":"BLOCKTEMP","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
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@ -317,7 +317,7 @@
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"modulep": [
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{"type":"MODULE","name":"@CONST-POOL@","addr":"(OF)","loc":"a,0:0,0:0","origName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
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"stmtsp": [
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{"type":"SCOPE","name":"@CONST-POOL@","addr":"(PF)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(OF)","varsp": [],"blocksp": []}
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{"type":"SCOPE","name":"@CONST-POOL@","addr":"(PF)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(OF)","varsp": [],"blocksp": [],"inlinesp": []}
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],"activesp": []}
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]}
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]}
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@ -14,7 +14,7 @@
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"modulep": [
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{"type":"MODULE","name":"@CONST-POOL@","addr":"(H)","loc":"a,0:0,0:0","origName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
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"stmtsp": [
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{"type":"SCOPE","name":"@CONST-POOL@","addr":"(I)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(H)","varsp": [],"blocksp": []}
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{"type":"SCOPE","name":"@CONST-POOL@","addr":"(I)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(H)","varsp": [],"blocksp": [],"inlinesp": []}
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],"activesp": []}
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]}
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]}
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@ -93,7 +93,7 @@
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"modulep": [
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{"type":"MODULE","name":"@CONST-POOL@","addr":"(AC)","loc":"a,0:0,0:0","origName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
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"stmtsp": [
|
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{"type":"SCOPE","name":"@CONST-POOL@","addr":"(BC)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(AC)","varsp": [],"blocksp": []}
|
||||
{"type":"SCOPE","name":"@CONST-POOL@","addr":"(BC)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(AC)","varsp": [],"blocksp": [],"inlinesp": []}
|
||||
],"activesp": []}
|
||||
]}
|
||||
]}
|
||||
|
@ -99,7 +99,7 @@
|
||||
"modulep": [
|
||||
{"type":"MODULE","name":"@CONST-POOL@","addr":"(AC)","loc":"a,0:0,0:0","origName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
|
||||
"stmtsp": [
|
||||
{"type":"SCOPE","name":"@CONST-POOL@","addr":"(BC)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(AC)","varsp": [],"blocksp": []}
|
||||
{"type":"SCOPE","name":"@CONST-POOL@","addr":"(BC)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(AC)","varsp": [],"blocksp": [],"inlinesp": []}
|
||||
],"activesp": []}
|
||||
]}
|
||||
]}
|
||||
|
20
test_regress/t/t_vpi_dump_missing_scopes.iv.out
Normal file
20
test_regress/t/t_vpi_dump_missing_scopes.iv.out
Normal file
@ -0,0 +1,20 @@
|
||||
t (vpiModule) t
|
||||
vpiInternalScope:
|
||||
t.top_wrap_1 (vpiModule) t.top_wrap_1
|
||||
vpiInternalScope:
|
||||
t.top_wrap_1.gen_loop[0] (vpiGenScope) t.top_wrap_1.gen_loop[0]
|
||||
vpiParameter:
|
||||
t.top_wrap_1.gen_loop[0].i (vpiParameter) t.top_wrap_1.gen_loop[0].i
|
||||
vpiConstType=vpiBinaryConst
|
||||
vpiInternalScope:
|
||||
t.top_wrap_1.gen_loop[0].after_gen_loop (vpiModule) t.top_wrap_1.gen_loop[0].after_gen_loop
|
||||
t.top_wrap_2 (vpiModule) t.top_wrap_2
|
||||
vpiInternalScope:
|
||||
t.top_wrap_2.gen_loop[0] (vpiGenScope) t.top_wrap_2.gen_loop[0]
|
||||
vpiParameter:
|
||||
t.top_wrap_2.gen_loop[0].i (vpiParameter) t.top_wrap_2.gen_loop[0].i
|
||||
vpiConstType=vpiBinaryConst
|
||||
vpiInternalScope:
|
||||
t.top_wrap_2.gen_loop[0].after_gen_loop (vpiModule) t.top_wrap_2.gen_loop[0].after_gen_loop
|
||||
*-* All Finished *-*
|
||||
t/t_vpi_dump_missing_scopes.v:21: $finish called at 0 (1s)
|
29
test_regress/t/t_vpi_dump_missing_scopes.out
Normal file
29
test_regress/t/t_vpi_dump_missing_scopes.out
Normal file
@ -0,0 +1,29 @@
|
||||
t (vpiModule) t
|
||||
vpiReg:
|
||||
vpiParameter:
|
||||
vpiInternalScope:
|
||||
top_wrap_1 (vpiModule) t.top_wrap_1
|
||||
vpiReg:
|
||||
vpiParameter:
|
||||
vpiInternalScope:
|
||||
gen_loop[0] (vpiGenScope) t.top_wrap_1.gen_loop[0]
|
||||
vpiReg:
|
||||
vpiParameter:
|
||||
vpiInternalScope:
|
||||
after_gen_loop (vpiModule) t.top_wrap_1.gen_loop[0].after_gen_loop
|
||||
vpiReg:
|
||||
subsig1 (vpiReg) t.top_wrap_1.gen_loop[0].after_gen_loop.subsig1
|
||||
vpiParameter:
|
||||
top_wrap_2 (vpiModule) t.top_wrap_2
|
||||
vpiReg:
|
||||
vpiParameter:
|
||||
vpiInternalScope:
|
||||
gen_loop[0] (vpiGenScope) t.top_wrap_2.gen_loop[0]
|
||||
vpiReg:
|
||||
vpiParameter:
|
||||
vpiInternalScope:
|
||||
after_gen_loop (vpiModule) t.top_wrap_2.gen_loop[0].after_gen_loop
|
||||
vpiReg:
|
||||
subsig1 (vpiReg) t.top_wrap_2.gen_loop[0].after_gen_loop.subsig1
|
||||
vpiParameter:
|
||||
*-* All Finished *-*
|
34
test_regress/t/t_vpi_dump_missing_scopes.pl
Executable file
34
test_regress/t/t_vpi_dump_missing_scopes.pl
Executable file
@ -0,0 +1,34 @@
|
||||
#!/usr/bin/env perl
|
||||
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
|
||||
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
|
||||
#
|
||||
# Copyright 2024 by Wilson Snyder. This program is free software; you
|
||||
# can redistribute it and/or modify it under the terms of either the GNU
|
||||
# Lesser General Public License Version 3 or the Perl Artistic License
|
||||
# Version 2.0.
|
||||
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
|
||||
|
||||
scenarios(simulator => 1);
|
||||
|
||||
skip("Known compiler limitation")
|
||||
if $Self->cxx_version =~ /\(GCC\) 4.4/;
|
||||
|
||||
compile(
|
||||
make_top_shell => 0,
|
||||
make_main => 0,
|
||||
make_pli => "t_vpi_dump.cpp",
|
||||
iv_flags2 => ["-g2005-sv"],
|
||||
verilator_flags2 => ["--exe --vpi --public-flat-rw --no-l2name $Self->{t_dir}/t_vpi_dump.cpp $Self->{t_dir}/TestVpiMain.cpp"],
|
||||
make_flags => 'CPPFLAGS_ADD=-DVL_NO_LEGACY',
|
||||
);
|
||||
|
||||
execute(
|
||||
use_libvpi => 1,
|
||||
check_finished => 1,
|
||||
expect_filename => $Self->{golden_filename},
|
||||
xrun_run_expect_filename => ($Self->{golden_filename} =~ s/\.out$/.xrun.out/r),
|
||||
iv_run_expect_filename => ($Self->{golden_filename} =~ s/\.out$/.iv.out/r),
|
||||
);
|
||||
|
||||
ok(1);
|
||||
1;
|
46
test_regress/t/t_vpi_dump_missing_scopes.v
Normal file
46
test_regress/t/t_vpi_dump_missing_scopes.v
Normal file
@ -0,0 +1,46 @@
|
||||
// DESCRIPTION: Verilator: Verilog Test module
|
||||
//
|
||||
// Copyright 2010 by Wilson Snyder. This program is free software; you can
|
||||
// redistribute it and/or modify it under the terms of either the GNU
|
||||
// Lesser General Public License Version 3 or the Perl Artistic License
|
||||
// Version 2.0.
|
||||
// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
|
||||
|
||||
|
||||
// using public_on causes one to be AstCellInline, and that one has correct scope
|
||||
// without this, both are AstCellInline, and both are wrong
|
||||
|
||||
/* verilator public_on */
|
||||
|
||||
module t ( /*AUTOARG*/
|
||||
);
|
||||
|
||||
|
||||
initial begin
|
||||
$write("*-* All Finished *-*\n");
|
||||
$finish();
|
||||
end
|
||||
|
||||
|
||||
gen_wrapper top_wrap_1 ();
|
||||
gen_wrapper top_wrap_2 ();
|
||||
|
||||
endmodule : t
|
||||
|
||||
module sub;
|
||||
reg subsig1;
|
||||
endmodule : sub
|
||||
|
||||
|
||||
module gen_wrapper;
|
||||
genvar i;
|
||||
generate
|
||||
for (i = 0; i < 1; i++) begin : gen_loop
|
||||
|
||||
// This fixes the scope
|
||||
// localparam int x = 2;
|
||||
|
||||
sub after_gen_loop ();
|
||||
end
|
||||
endgenerate
|
||||
endmodule
|
Loading…
Reference in New Issue
Block a user