Tests: Avoid multiple lint/compile runs in one test; hard to debug

This commit is contained in:
Wilson Snyder 2024-09-20 20:34:35 -04:00
parent 80cba789f4
commit 5a6f2b661d
10 changed files with 74 additions and 11 deletions

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@ -0,0 +1,16 @@
#!/usr/bin/env python3
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2024 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
import vltest_bootstrap
test.scenarios('linter')
test.lint(verilator_flags2=["-DTEST_DECLARE_STD"])
test.passes()

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@ -1,4 +1,4 @@
%Error-PKGNODECL: t/t_std_identifier_bad.v:16:20: Package/class 'std' not found, and needs to be predeclared (IEEE 1800-2023 26.3)
%Error-PKGNODECL: t/t_std_identifier.v:16:20: Package/class 'std' not found, and needs to be predeclared (IEEE 1800-2023 26.3)
16 | int baz = foo::std::bar;
| ^~~
... For error description see https://verilator.org/warn/PKGNODECL?v=latest

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@ -10,9 +10,8 @@
import vltest_bootstrap
test.scenarios('linter')
test.top_filename = "t/t_std_identifier.v"
test.lint(fails=True, expect_filename=test.golden_filename)
test.lint(verilator_flags2=["-DTEST_DECLARE_STD"])
test.passes()

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@ -13,6 +13,4 @@ test.scenarios('simulator')
test.lint(verilator_flags2=["--exe --main --timing"])
test.lint(verilator_flags2=["--exe --main --timing --DUSE_STD_PREFIX"])
test.passes()

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@ -0,0 +1,17 @@
#!/usr/bin/env python3
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2024 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
import vltest_bootstrap
test.scenarios('simulator')
test.top_filename = "t/t_std_process_self.v"
test.lint(verilator_flags2=["--exe --main --timing --DUSE_STD_PREFIX"])
test.passes()

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@ -19,8 +19,6 @@ test.file_grep(
r'%Warning-UNOPTFLAT: t/t_timing_fork_comb.v:\d+:\d+: Signal unoptimizable: Circular combinational logic:'
)
test.compile(verilator_flags2=["--exe --main --timing -Wno-UNOPTFLAT"])
test.execute()
test.passes()

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@ -0,0 +1,19 @@
#!/usr/bin/env python3
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2024 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
import vltest_bootstrap
test.scenarios('simulator')
test.top_filename = "t/t_timing_fork_comb.v"
test.compile(verilator_flags2=["--exe --main --timing -Wno-UNOPTFLAT"])
test.execute()
test.passes()

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@ -15,8 +15,4 @@ test.compile(verilator_flags2=["--binary"])
test.execute(expect_filename=test.golden_filename)
test.compile(verilator_flags2=["--binary -fno-localize"])
test.execute(expect_filename=test.golden_filename)
test.passes()

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@ -0,0 +1,20 @@
#!/usr/bin/env python3
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2024 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
import vltest_bootstrap
test.scenarios('simulator')
test.top_filename = "t/t_timing_intra_assign.v"
test.golden_filename = "t/t_timing_intra_assign.out"
test.compile(verilator_flags2=["--binary -fno-localize"])
test.execute()
test.passes()