mirror of
https://github.com/verilator/verilator.git
synced 2025-04-05 04:02:37 +00:00
Commentary
This commit is contained in:
parent
fd1e4d9e45
commit
221fecad0b
11
README.rst
11
README.rst
@ -87,12 +87,11 @@ thread is about 100 times faster than interpreted Verilog simulators such
|
|||||||
as `Icarus Verilog`_. Another 2-10x speedup might be gained from
|
as `Icarus Verilog`_. Another 2-10x speedup might be gained from
|
||||||
multithreading (yielding 200-1000x total over interpreted simulators).
|
multithreading (yielding 200-1000x total over interpreted simulators).
|
||||||
|
|
||||||
Verilator has typically similar or better performance versus
|
Verilator has typically similar or better performance versus closed-source
|
||||||
closed-source Verilog simulators (e.g., Carbon Design Systems Carbonator,
|
Verilog simulators (e.g., Aldec Riviera-Pro, Cadence Incisive/NC-Verilog,
|
||||||
Modelsim/Questa, Cadence Incisive/NC-Verilog, Synopsys VCS, VTOC, and
|
Mentor ModelSim/Questa, Synopsys VCS, VTOC, and Pragmatic CVer/CVC). But,
|
||||||
Pragmatic CVer/CVC). But, Verilator is open-sourced, so you can spend on
|
Verilator is open-sourced, so you can spend on computes rather than
|
||||||
computes rather than licenses. Thus, Verilator gives you the best
|
licenses. Thus, Verilator gives you the best simulation cycles/dollar.
|
||||||
simulation cycles/dollar.
|
|
||||||
|
|
||||||
|
|
||||||
Installation & Documentation
|
Installation & Documentation
|
||||||
|
Loading…
Reference in New Issue
Block a user