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README.rst
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README.rst
@ -87,12 +87,11 @@ thread is about 100 times faster than interpreted Verilog simulators such
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as `Icarus Verilog`_. Another 2-10x speedup might be gained from
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multithreading (yielding 200-1000x total over interpreted simulators).
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Verilator has typically similar or better performance versus
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closed-source Verilog simulators (e.g., Carbon Design Systems Carbonator,
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Modelsim/Questa, Cadence Incisive/NC-Verilog, Synopsys VCS, VTOC, and
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Pragmatic CVer/CVC). But, Verilator is open-sourced, so you can spend on
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computes rather than licenses. Thus, Verilator gives you the best
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simulation cycles/dollar.
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Verilator has typically similar or better performance versus closed-source
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Verilog simulators (e.g., Aldec Riviera-Pro, Cadence Incisive/NC-Verilog,
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Mentor ModelSim/Questa, Synopsys VCS, VTOC, and Pragmatic CVer/CVC). But,
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Verilator is open-sourced, so you can spend on computes rather than
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licenses. Thus, Verilator gives you the best simulation cycles/dollar.
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Installation & Documentation
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