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20 lines
484 B
Coq
20 lines
484 B
Coq
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2009 by Wilson Snyder.
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module t ();
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// This shows the uglyness in width warnings across param modules
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// TODO: Would be nice to also show relevant parameter settings
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p #(.WIDTH(4)) p4 (.in(4'd0));
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p #(.WIDTH(5)) p5 (.in(5'd0));
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endmodule
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module p
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#(parameter WIDTH=64)
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(input [WIDTH-1:0] in);
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wire [4:0] out = in;
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endmodule
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