verilator/test_regress/t/t_delay_stmtdly_bad.out

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%Warning-ASSIGNDLY: t/t_delay.v:20:11: Unsupported: Ignoring delay on this assignment/primitive.
20 | assign #(1.2000000000000000) dly1 = dly0 + 32'h1;
| ^
... Use "/* verilator lint_off ASSIGNDLY */" and lint_on around source to disable this message.
%Warning-ASSIGNDLY: t/t_delay.v:25:18: Unsupported: Ignoring delay on this assignment/primitive.
25 | dly0 <= #0 32'h11;
| ^
%Warning-ASSIGNDLY: t/t_delay.v:28:18: Unsupported: Ignoring delay on this assignment/primitive.
28 | dly0 <= #0.12 dly0 + 32'h12;
| ^
%Warning-STMTDLY: t/t_delay.v:34:10: Unsupported: Ignoring delay on this delayed statement.
34 | #100 $finish;
| ^
%Error: Exiting due to