mirror of
https://github.com/verilator/verilator.git
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248 lines
2.6 KiB
Plaintext
248 lines
2.6 KiB
Plaintext
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$date
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Wed Apr 14 17:04:26 2021
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$end
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$version
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fstWriter
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$end
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$timescale
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1ps
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$end
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$scope module top $end
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$var wire 1 ! clk $end
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$scope module t $end
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$var wire 1 ! clk $end
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$var integer 32 " cyc $end
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$var integer 32 # unchanged $end
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$upscope $end
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$upscope $end
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$enddefinitions $end
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#100
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$dumpvars
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b00000000000000000000000000101010 #
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b00000000000000000000000000110010 "
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1!
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$end
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0!
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1!
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1!
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b00000000000000000000000000110100 "
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1!
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b00000000000000000000000000110101 "
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1!
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b00000000000000000000000000110110 "
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1!
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b00000000000000000000000000110111 "
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1!
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b00000000000000000000000000111000 "
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1!
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b00000000000000000000000000111100 "
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1!
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b00000000000000000000000000111101 "
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b00000000000000000000000001000000 "
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b00000000000000000000000001000001 "
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b00000000000000000000000001000010 "
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b00000000000000000000000001000100 "
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b00000000000000000000000001010001 "
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b00000000000000000000000001010100 "
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b00000000000000000000000001010101 "
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b00000000000000000000000001010110 "
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b00000000000000000000000001010111 "
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b00000000000000000000000001011000 "
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b00000000000000000000000001011001 "
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#189
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0!
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