2020-02-29 14:44:51 +00:00
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// DESCRIPTION: Verilator: Verilog Test
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//
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// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can
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// redistribute it and/or modify it under the terms of either the GNU
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// Lesser General Public License Version 3 or the Perl Artistic License
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// Version 2.0.
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2020-03-21 15:24:24 +00:00
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// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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2020-02-29 14:44:51 +00:00
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2020-10-28 22:42:36 +00:00
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// clang-format off
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2020-02-29 14:44:51 +00:00
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#include "verilatedos.h"
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#include VM_PREFIX_INCLUDE
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#include "Vt_trace_two_b.h"
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#include "verilated.h"
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2020-03-02 02:39:23 +00:00
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#ifdef TEST_HDR_TRACE
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# ifdef TEST_FST
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# include "verilated_fst_c.h"
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# else
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# include "verilated_vcd_c.h"
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# endif
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#endif
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2020-10-28 22:42:36 +00:00
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// clang-format on
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2020-02-29 14:44:51 +00:00
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// Compile in place
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2021-07-19 16:46:17 +00:00
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#include "Vt_trace_two_b__ALL.cpp"
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2020-02-29 14:44:51 +00:00
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VM_PREFIX* ap;
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Vt_trace_two_b* bp;
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2022-11-23 23:50:31 +00:00
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int main(int argc, char** argv) {
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2022-07-09 13:50:50 +00:00
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const std::unique_ptr<VerilatedContext> contextp{new VerilatedContext};
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2022-03-27 19:03:25 +00:00
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uint64_t sim_time = 1100;
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2022-07-09 13:50:50 +00:00
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contextp->debug(0);
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2023-01-21 19:05:11 +00:00
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contextp->commandArgs(argc, argv);
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2022-07-09 13:50:50 +00:00
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contextp->traceEverOn(true);
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2020-02-29 14:44:51 +00:00
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srand48(5);
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2022-07-09 13:50:50 +00:00
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ap = new VM_PREFIX{contextp.get(), "topa"};
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bp = new Vt_trace_two_b{contextp.get(), "topb"};
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2020-02-29 14:44:51 +00:00
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2020-10-28 22:42:36 +00:00
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// clang-format off
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2020-03-02 02:39:23 +00:00
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#ifdef TEST_HDR_TRACE
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2022-07-09 13:50:50 +00:00
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contextp->traceEverOn(true);
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2020-03-02 02:39:23 +00:00
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# ifdef TEST_FST
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VerilatedFstC* tfp = new VerilatedFstC;
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ap->trace(tfp, 99);
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bp->trace(tfp, 99);
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tfp->open(VL_STRINGIFY(TEST_OBJ_DIR) "/simx.fst");
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# else
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2020-02-29 14:44:51 +00:00
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VerilatedVcdC* tfp = new VerilatedVcdC;
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ap->trace(tfp, 99);
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bp->trace(tfp, 99);
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tfp->open(VL_STRINGIFY(TEST_OBJ_DIR) "/simx.vcd");
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2020-03-02 02:39:23 +00:00
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# endif
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2020-03-07 23:39:58 +00:00
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#endif
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2020-10-28 22:42:36 +00:00
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// clang-format on
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2020-03-07 23:39:58 +00:00
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#ifdef TEST_HDR_TRACE
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ap->eval_step();
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bp->eval_step();
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ap->eval_end_step();
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bp->eval_end_step();
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2022-07-09 13:50:50 +00:00
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if (tfp) tfp->dump(contextp->time());
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2020-02-29 14:44:51 +00:00
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#endif
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2020-03-07 23:39:58 +00:00
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2020-02-29 14:44:51 +00:00
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{
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ap->clk = false;
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2022-07-09 13:50:50 +00:00
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contextp->timeInc(10);
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2020-02-29 14:44:51 +00:00
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}
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2022-07-09 13:50:50 +00:00
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while (contextp->time() < sim_time && !contextp->gotFinish()) {
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2020-02-29 14:44:51 +00:00
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ap->clk = !ap->clk;
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bp->clk = ap->clk;
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2020-03-02 02:39:23 +00:00
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ap->eval_step();
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bp->eval_step();
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ap->eval_end_step();
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bp->eval_end_step();
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#ifdef TEST_HDR_TRACE
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2022-07-09 13:50:50 +00:00
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if (tfp) tfp->dump(contextp->time());
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2020-03-02 02:39:23 +00:00
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#endif
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2022-07-09 13:50:50 +00:00
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contextp->timeInc(5);
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2020-02-29 14:44:51 +00:00
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}
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2022-07-09 13:50:50 +00:00
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if (!contextp->gotFinish()) {
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2020-02-29 14:44:51 +00:00
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vl_fatal(__FILE__, __LINE__, "main", "%Error: Timeout; never got a $finish");
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}
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ap->final();
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bp->final();
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2020-03-07 23:39:58 +00:00
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2020-03-02 02:39:23 +00:00
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#ifdef TEST_HDR_TRACE
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2020-02-29 14:44:51 +00:00
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if (tfp) tfp->close();
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2021-02-26 01:38:38 +00:00
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VL_DO_DANGLING(delete tfp, tfp);
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2020-03-02 02:39:23 +00:00
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#endif
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2020-02-29 14:44:51 +00:00
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VL_DO_DANGLING(delete ap, ap);
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VL_DO_DANGLING(delete bp, bp);
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2021-02-26 00:26:36 +00:00
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return 0;
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2020-02-29 14:44:51 +00:00
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}
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