github/verilator
1
0
Fork 1
mirror of https://github.com/verilator/verilator.git synced 2025-01-08 23:57:35 +00:00
Code Issues Packages Projects Releases Wiki Activity

Tests: Cleanup vluint_t/vlsint_t in tests, part of (#3255)

Browse Source
This commit is contained in:
Wilson Snyder 2022-03-27 15:03:25 -04:00
parent 31ce1fdfd3
commit 960d0de361
21 changed files with 42 additions and 42 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
test_regress/t/t_clk_inp_init.cpp
View File

@ -9,7 +9,7 @@
#include "verilated.h"
void oneTest(int argc, char** argv, int seed) {
vluint64_t sim_time = 1000;
uint64_t sim_time = 1000;
#ifdef TEST_VERBOSE
VL_PRINTF("== Seed=%d\n", seed);

6
test_regress/t/t_cover_lib_c.cpp
View File

@ -30,7 +30,7 @@ int errors = 0;
const char* name() { return "main"; }
void hier_insert(VerilatedCovContext* covContextp, vluint64_t* countp, const char* hierp,
void hier_insert(VerilatedCovContext* covContextp, uint64_t* countp, const char* hierp,
const char* peri) {
// This needs to be a function at one line number so all of the
// line numbers for coverage are constant, otherwise instances won't combine.
@ -38,8 +38,8 @@ void hier_insert(VerilatedCovContext* covContextp, vluint64_t* countp, const cha
}
int main() {
vluint32_t covers[1];
vluint64_t coverw[6];
uint32_t covers[1];
uint64_t coverw[6];
VerilatedCovContext* covContextp = Verilated::defaultContextp()->coveragep();

10
test_regress/t/t_dpi_var.cpp
View File

@ -18,7 +18,7 @@
//======================================================================
struct MyMon {
vluint32_t* sigsp[2];
uint32_t* sigsp[2];
MyMon() {
sigsp[0] = NULL;
sigsp[1] = NULL;
@ -31,7 +31,7 @@ void mon_register_a(const char* namep, void* sigp, bool isOut) {
#ifdef TEST_VERBOSE
VL_PRINTF("- mon_register_a(\"%s\", %p, %d);\n", namep, sigp, isOut);
#endif
mons[0].sigsp[isOut] = (vluint32_t*)sigp;
mons[0].sigsp[isOut] = (uint32_t*)sigp;
}
void mon_do(MyMon* monp) {
@ -80,9 +80,9 @@ void mon_register_b(const char* namep, int isOut) {
} else if (varp->vltype() != VLVT_UINT32) {
VL_PRINTF("%%Warning: wrong type for signal: \"%s\"\n", namep);
} else {
vluint32_t* datap = (vluint32_t*)(varp->datap());
uint32_t* datap = (uint32_t*)(varp->datap());
VL_PRINTF("- mon_register_b('%s', \"%s\", %p, %d);\n", modp, namep, datap, isOut);
mons[1].sigsp[isOut] = (vluint32_t*)(varp->datap());
mons[1].sigsp[isOut] = (uint32_t*)(varp->datap());
}
}
@ -114,7 +114,7 @@ unsigned int main_time = 0;
double sc_time_stamp() { return main_time; }
int main(int argc, char** argv, char** env) {
vluint64_t sim_time = 1100;
uint64_t sim_time = 1100;
Verilated::commandArgs(argc, argv);
Verilated::debug(0);

2
test_regress/t/t_extend.v
View File

@ -56,7 +56,7 @@ module t (/*AUTOARG*/
#error "`systemc_header didn't work"
#endif
bool m_did_ctor;
vluint32_t my_function() {
uint32_t my_function() {
if (!m_did_ctor) vl_fatal(__FILE__, __LINE__, __FILE__, "`systemc_ctor didn't work");
return 1;
}

2
test_regress/t/t_extend_class_c.h
View File

@ -13,5 +13,5 @@ public:
~t_extend_class_c() {}
// METHODS
// This function will be called from a instance created in Verilog
inline vluint32_t my_math(vluint32_t in) { return in + 1; }
inline uint32_t my_math(uint32_t in) { return in + 1; }
};

2
test_regress/t/t_func_public.v
View File

@ -108,7 +108,7 @@ module tpub (
if (1'b1 != got_bool) $stop;
$c("this->publicGetLong(this->got_long);");
if (24'h11bca != got_long) $stop;
$c("{ vluint64_t qq; this->publicGetQuad(qq); this->got_quad=qq; }");
$c("{ uint64_t qq; this->publicGetQuad(qq); this->got_quad=qq; }");
if (60'haaaa_bbbb_cccc != got_quad) $stop;
$c("{ WData gw[3]; this->publicGetWide(gw); VL_ASSIGN_W(72,this->got_wide,gw); }");
if (72'hac_abca_aaaa_bbbb_1234 != got_wide) $stop;

6
test_regress/t/t_leak.cpp
View File

@ -29,7 +29,7 @@ long long get_memory_usage() {
if (!fp) return 0;
int ps_ign;
vluint64_t ps_vsize, ps_rss;
uint64_t ps_vsize, ps_rss;
int items = fscanf(fp,
("%d (%*[^) ]) %*1s %d %*d %*d %*d %*d %u"
" %u %u %u %u %d %d %d %d"
@ -78,7 +78,7 @@ void make_and_destroy() {
}
int main(int argc, char* argv[]) {
vluint64_t firstUsage = get_memory_usage();
uint64_t firstUsage = get_memory_usage();
// Warmup phase
for (int i = 0; i < 10; i++) { //
@ -94,7 +94,7 @@ int main(int argc, char* argv[]) {
}
}
vluint64_t leaked = get_memory_usage() - firstUsage;
uint64_t leaked = get_memory_usage() - firstUsage;
if (leaked > 64 * 1024) { // Have to allow some slop for this code.
printf("Leaked %" PRId64 " bytes, or ~ %" PRId64 " bytes/construt\n", //
leaked, leaked / loops);

12
test_regress/t/t_mem_multi_io2.cpp
View File

@ -28,12 +28,12 @@ int main()
tb = new VM_PREFIX("tb");
#ifdef SYSTEMC_VERSION
sc_signal<vluint32_t> i3;
sc_signal<vluint32_t> o3;
sc_signal<vluint32_t> i34[4];
sc_signal<vluint32_t> o34[4];
sc_signal<vluint32_t> i345[4][5];
sc_signal<vluint32_t> o345[4][5];
sc_signal<uint32_t> i3;
sc_signal<uint32_t> o3;
sc_signal<uint32_t> i34[4];
sc_signal<uint32_t> o34[4];
sc_signal<uint32_t> i345[4][5];
sc_signal<uint32_t> o345[4][5];
tb->i3(i3);
tb->o3(o3);

2
test_regress/t/t_order_multidriven.cpp
View File

@ -12,7 +12,7 @@ double sc_time_stamp() { return 0; }
Vt_order_multidriven* vcore;
VerilatedVcdC* vcd;
vluint64_t vtime;
uint64_t vtime;
#define PHASE_90

16
test_regress/t/t_scope_map.cpp
View File

@ -69,13 +69,13 @@ int main(int argc, char** argv, char** env) {
int varBits = varLeft + 1;
// First expect an incrementing byte pattern
vluint8_t* varData = reinterpret_cast<vluint8_t*>(varp->datap());
uint8_t* varData = reinterpret_cast<uint8_t*>(varp->datap());
for (int i = 0; i < varBits / 8; i++) {
#ifdef TEST_VERBOSE
VL_PRINTF("%02x ", varData[i]);
#endif
vluint8_t expected = i % 0xff;
const uint8_t expected = i % 0xff;
if (varData[i] != expected) {
VL_PRINTF("%%Error: Data mismatch, got 0x%02x, expected 0x%02x\n", varData[i],
expected);
@ -85,8 +85,8 @@ int main(int argc, char** argv, char** env) {
// Extra bits all set high initially
if (varBits % 8 != 0) {
vluint8_t got = varData[varBits / 8];
vluint8_t expected = ~(0xff << (varBits % 8));
const uint8_t got = varData[varBits / 8];
const uint8_t expected = ~(0xff << (varBits % 8));
if (got != expected) {
VL_PRINTF("%%Error: Data mismatch, got 0x%02x, expected 0x%02x\n", got,
expected);
@ -126,11 +126,11 @@ int main(int argc, char** argv, char** env) {
const VerilatedVar* varp = &(varname.second);
int varLeft = varp->packed().left();
int varBits = varLeft + 1;
vluint8_t* varData = reinterpret_cast<vluint8_t*>(varp->datap());
uint8_t* varData = reinterpret_cast<uint8_t*>(varp->datap());
// Check that all bits are high now
for (int i = 0; i < varBits / 8; i++) {
vluint8_t expected = 0xff;
const uint8_t expected = 0xff;
if (varData[i] != expected) {
VL_PRINTF("%%Error: Data mismatch (%s), got 0x%02x, expected 0x%02x\n",
varname.first, varData[i], expected);
@ -139,8 +139,8 @@ int main(int argc, char** argv, char** env) {
}
if (varBits % 8 != 0) {
vluint8_t got = varData[varBits / 8];
vluint8_t expected = ~(0xff << (varBits % 8));
const uint8_t got = varData[varBits / 8];
const uint8_t expected = ~(0xff << (varBits % 8));
if (got != expected) {
VL_PRINTF("%%Error: Data mismatch (%s), got 0x%02x, expected 0x%02x\n",
varname.first, got, expected);

4
test_regress/t/t_trace_two_cc.cpp
View File

@ -25,11 +25,11 @@
VM_PREFIX* ap;
Vt_trace_two_b* bp;
vluint64_t main_time = 0;
uint64_t main_time = 0;
double sc_time_stamp() { return main_time; }
int main(int argc, char** argv, char** env) {
vluint64_t sim_time = 1100;
uint64_t sim_time = 1100;
Verilated::commandArgs(argc, argv);
Verilated::debug(0);
Verilated::traceEverOn(true);

2
test_regress/t/t_vpi_cb_iter.cpp
View File

@ -143,7 +143,7 @@ static void register_filler_cb() {
double sc_time_stamp() { return main_time; }
int main(int argc, char** argv, char** env) {
vluint64_t sim_time = 100;
uint64_t sim_time = 100;
Verilated::commandArgs(argc, argv);
Verilated::debug(0);

2
test_regress/t/t_vpi_cbs_called.cpp
View File

@ -248,7 +248,7 @@ static int register_test_callback() {
double sc_time_stamp() { return main_time; }
int main(int argc, char** argv, char** env) {
vluint64_t sim_time = 100;
uint64_t sim_time = 100;
bool cbs_called;
Verilated::commandArgs(argc, argv);

2
test_regress/t/t_vpi_get.cpp
View File

@ -242,7 +242,7 @@ void (*vlog_startup_routines[])() = {vpi_compat_bootstrap, 0};
#else
double sc_time_stamp() { return main_time; }
int main(int argc, char** argv, char** env) {
vluint64_t sim_time = 1100;
uint64_t sim_time = 1100;
Verilated::commandArgs(argc, argv);
Verilated::debug(0);

2
test_regress/t/t_vpi_memory.cpp
View File

@ -252,7 +252,7 @@ void (*vlog_startup_routines[])() = {vpi_compat_bootstrap, 0};
double sc_time_stamp() { return main_time; }
int main(int argc, char** argv, char** env) {
vluint64_t sim_time = 1100;
uint64_t sim_time = 1100;
Verilated::commandArgs(argc, argv);
Verilated::debug(0);
// we're going to be checking for these errors do don't crash out

2
test_regress/t/t_vpi_module.cpp
View File

@ -174,7 +174,7 @@ void (*vlog_startup_routines[])() = {vpi_compat_bootstrap, 0};
double sc_time_stamp() { return main_time; }
int main(int argc, char** argv, char** env) {
vluint64_t sim_time = 1100;
uint64_t sim_time = 1100;
Verilated::commandArgs(argc, argv);
Verilated::debug(0);
// we're going to be checking for these errors do don't crash out

2
test_regress/t/t_vpi_param.cpp
View File

@ -242,7 +242,7 @@ void (*vlog_startup_routines[])() = {vpi_compat_bootstrap, 0};
double sc_time_stamp() { return main_time; }
int main(int argc, char** argv, char** env) {
vluint64_t sim_time = 1100;
uint64_t sim_time = 1100;
Verilated::commandArgs(argc, argv);
Verilated::debug(0);
// we're going to be checking for these errors do don't crash out

2
test_regress/t/t_vpi_time_cb.cpp
View File

@ -29,7 +29,7 @@ unsigned int main_time = 0;
double sc_time_stamp() { return main_time; }
int main(int argc, char** argv, char** env) {
vluint64_t sim_time = 1100;
uint64_t sim_time = 1100;
Verilated::commandArgs(argc, argv);
Verilated::debug(0);

2
test_regress/t/t_vpi_unimpl.cpp
View File

@ -186,7 +186,7 @@ extern "C" int mon_check() {
double sc_time_stamp() { return main_time; }
int main(int argc, char** argv, char** env) {
vluint64_t sim_time = 1100;
uint64_t sim_time = 1100;
Verilated::commandArgs(argc, argv);
Verilated::debug(0);
// we're going to be checking for these errors do don't crash out

2
test_regress/t/t_vpi_var.cpp
View File

@ -693,7 +693,7 @@ void (*vlog_startup_routines[])() = {vpi_compat_bootstrap, 0};
double sc_time_stamp() { return main_time; }
int main(int argc, char** argv, char** env) {
vluint64_t sim_time = 1100;
uint64_t sim_time = 1100;
Verilated::commandArgs(argc, argv);
Verilated::debug(0);

2
test_regress/t/t_vpi_zero_time_cb.cpp
View File

@ -108,7 +108,7 @@ void (*vlog_startup_routines[])() = {vpi_compat_bootstrap, 0};
double sc_time_stamp() { return main_time; }
int main(int argc, char** argv, char** env) {
vluint64_t sim_time = 1100;
uint64_t sim_time = 1100;
Verilated::commandArgs(argc, argv);
Verilated::debug(0);