forked from github/verilator
29 lines
546 B
Systemverilog
29 lines
546 B
Systemverilog
// DESCRIPTION: Verilator: $display() test for %l
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//
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2021 by Wilson Snyder.
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// SPDX-License-Identifier: CC0-1.0
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module t(/*AUTOARG*/
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// Outputs
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o,
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// Inputs
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i
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);
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input logic [95:0] i;
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output logic [95:0] o;
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string a_s;
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initial begin
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o = ~i;
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$sformat(a_s, "%h", i);
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$display(a_s);
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$sformat(a_s, "%h", o);
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$display(a_s);
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$write("*-* All Finished *-*\n");
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$finish;
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end
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endmodule
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