forked from github/verilator
170 lines
5.5 KiB
Systemverilog
170 lines
5.5 KiB
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2020 Yossi Nivin.
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// SPDX-License-Identifier: CC0-1.0
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module t(/*AUTOARG*/
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// Inputs
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clk
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);
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input clk;
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reg [15:0] in16;
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reg [31:0] in32;
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reg [63:0] in64;
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// Non-standard size
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reg [9:0] in10;
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reg [20:0] in21;
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reg [58:0] in59;
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reg [69:0] in70;
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reg [31:0] ctrl0;
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reg [31:0] ctrl1;
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reg [31:0] ctrl2;
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reg [4:0] result_16_1;
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reg [4:0] result_16_2;
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reg [4:0] result_16_3;
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reg [5:0] result_32_1;
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reg [5:0] result_32_2;
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reg [5:0] result_32_3;
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reg [6:0] result_64_1;
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reg [6:0] result_64_2;
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reg [6:0] result_64_3;
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reg [3:0] result_10_3;
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reg [4:0] result_21_3;
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reg [5:0] result_59_3;
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reg [6:0] result_70_3;
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initial begin
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if ($countbits(32'b111100000000, '1) != 4) $stop;
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if ($countbits(32'b111100000000, '0) != 28) $stop;
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if ($countbits(32'b111100000000, '0, '1) != 32) $stop;
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if ($countbits(4'bxxx0, 'x) != 3) $stop;
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if ($countbits(4'bzzz0, 'z) != 3) $stop;
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if ($countbits(4'b1zz0, 'z, '0) != 3) $stop;
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if ($countbits(4'b1xx0, 'x, '0) != 3) $stop;
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if ($countbits(4'b1xx0, 'x, '0, '1) != 4) $stop;
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if ($countbits(4'bzzx0, 'x, 'z) != 3) $stop;
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end
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always @* begin
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result_16_1 = $countbits(in16, ctrl0);
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result_16_2 = $countbits(in16, ctrl0, ctrl1);
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result_16_3 = $countbits(in16, ctrl0, ctrl1, ctrl2);
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result_32_1 = $countbits(in32, ctrl0);
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result_32_2 = $countbits(in32, ctrl0, ctrl1);
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result_32_3 = $countbits(in32, ctrl0, ctrl1, ctrl2);
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result_64_1 = $countbits(in64, ctrl0);
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result_64_2 = $countbits(in64, ctrl0, ctrl1);
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result_64_3 = $countbits(in64, ctrl0, ctrl1, ctrl2);
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result_10_3 = $countbits(in10, ctrl0, ctrl1, ctrl2);
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result_21_3 = $countbits(in21, ctrl0, ctrl1, ctrl2);
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result_59_3 = $countbits(in59, ctrl0, ctrl1, ctrl2);
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result_70_3 = $countbits(in70, ctrl0, ctrl1, ctrl2);
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end
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logic [31:0] val = 32'h70008421;
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integer cyc = 0;
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// Test loop
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always @ (posedge clk) begin
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cyc <= cyc + 1;
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if (cyc == 0) begin
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// Constants
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if ($countbits(32'b11001011101, '1) != 7) $stop;
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if ($countbits(32'b11001011101, '1, 'z) != 7) $stop;
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if ($countbits(32'b11001011101, '1, '0) != 32) $stop;
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if ($countbits(20'b11001011101, '1, '0) != 20) $stop;
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if ($countbits(20'b1100x01z101, '1, '0) != 18) $stop;
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if ($countbits(20'b1100x01z101, 2, 2'bx1) != 18) $stop;
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if ($countbits(32'b1100x01z101, 'x, 'z) != 2) $stop;
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if ($countbits(32'b1100x01z101, 'x, 'z, '1) != 7) $stop;
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if ($countbits(val, '1) != 7) $stop;
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if ($countones(val) != 7) $stop;
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if ($countbits(val, '0) != 25) $stop;
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if ($countbits(val, '0, '1) != 32) $stop;
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// Optimization may depend on position of X, so need to walk it
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if ($countbits(val, 'x) != 0) $stop;
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if ($countbits(val, 'x, '1) != 7) $stop;
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if ($countbits(val, '1, 'x) != 7) $stop;
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if ($countbits(val, '1, '1, 'x) != 7) $stop;
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if ($countbits(val, 'x, '0) != 25) $stop;
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if ($countbits(val, 'x, '0, '1) != 32) $stop;
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// Optimization may depend on position of Z, so need to walk it
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if ($countbits(val, 'z) != 0) $stop;
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if ($countbits(val, 'z, '1) != 7) $stop;
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if ($countbits(val, '1, 'z) != 7) $stop;
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if ($countbits(val, '1, '1, 'z) != 7) $stop;
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if ($countbits(val, 'z, '0) != 25) $stop;
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if ($countbits(val, 'z, '0, '1) != 32) $stop;
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//
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if ($countbits(val, 'x, 'z) != 0) $stop;
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end
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else if (cyc == 1) begin
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in16 <= 16'h0AF0;
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in32 <= 32'hA0F300;
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in64 <= 64'hA5A5A5A5A5A5A5A5;
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in10 <= 10'b1010_1011;
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in21 <= 21'h10F102;
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in59 <= 59'h7050137210;
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in70 <= 70'hF00030008000;
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ctrl0 <= '0;
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ctrl1 <= '1;
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ctrl2 <= '1;
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end
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else if (cyc == 2) begin
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if (result_16_1 != 10) $stop;
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if (result_16_2 != 16) $stop;
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if (result_16_3 != 16) $stop;
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if (result_32_1 != 24) $stop;
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if (result_32_2 != 32) $stop;
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if (result_32_3 != 32) $stop;
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if (result_64_1 != 32) $stop;
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if (result_64_2 != 64) $stop;
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if (result_64_3 != 64) $stop;
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if (result_10_3 != 10) $stop;
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if (result_21_3 != 21) $stop;
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if (result_59_3 != 59) $stop;
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if (result_70_3 != 70) $stop;
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in16 <= 16'h82B;
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in32 <= 32'h305372;
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in64 <= 64'h7777777777777777;
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in10 <= 10'b1001_0111;
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in21 <= 21'h91040C;
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in59 <= 59'h12345678;
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in70 <= 70'hF11111111;
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// Confirm upper bits of the control arguments are ignored
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ctrl0 <= 5;
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ctrl1 <= 3;
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ctrl2 <= 2;
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end
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else if (cyc == 3) begin
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if (result_16_1 != 5) $stop;
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if (result_16_2 != 5) $stop;
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if (result_16_3 != 16) $stop;
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if (result_32_1 != 10) $stop;
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if (result_32_2 != 10) $stop;
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if (result_32_3 != 32) $stop;
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if (result_64_1 != 48) $stop;
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if (result_64_2 != 48) $stop;
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if (result_64_3 != 64) $stop;
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if (result_10_3 != 10) $stop;
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if (result_21_3 != 21) $stop;
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if (result_59_3 != 59) $stop;
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if (result_70_3 != 70) $stop;
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end
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else if (cyc == 4) begin
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$write("*-* All Finished *-*\n");
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$finish;
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end
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end
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endmodule
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