forked from github/verilator
42 lines
2.3 KiB
Plaintext
42 lines
2.3 KiB
Plaintext
%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:7:1: Unsupported: Verilog 2001-config reserved word not implemented: 'config'
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7 | config cfgBad;
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| ^~~~~~
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... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
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%Error: t/t_lint_rsvd_bad.v:7:8: syntax error, unexpected IDENTIFIER
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7 | config cfgBad;
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| ^~~~~~
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%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:8:4: Unsupported: Verilog 2001-config reserved word not implemented: 'design'
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8 | design rtlLib.top;
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| ^~~~~~
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%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:9:12: Unsupported: Verilog 2001-config reserved word not implemented: 'liblist'
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9 | default liblist rtlLib;
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| ^~~~~~~
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%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:10:4: Unsupported: Verilog 2001-config reserved word not implemented: 'instance'
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10 | instance top.a2 liblist gateLib;
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| ^~~~~~~~
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%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:10:20: Unsupported: Verilog 2001-config reserved word not implemented: 'liblist'
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10 | instance top.a2 liblist gateLib;
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| ^~~~~~~
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%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:11:4: Unsupported: Verilog 2001-config reserved word not implemented; suggest you want `include instead: 'include'
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11 | include none;
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| ^~~~~~~
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%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:12:4: Unsupported: Verilog 2001-config reserved word not implemented: 'library'
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12 | library rtlLib *.v;
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| ^~~~~~~
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%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:13:4: Unsupported: Verilog 2001-config reserved word not implemented; suggest you want `include instead: 'include'
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13 | include aa;
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| ^~~~~~~
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%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:14:4: Unsupported: Verilog 2001-config reserved word not implemented: 'use'
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14 | use gateLib;
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| ^~~
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%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:15:4: Unsupported: Verilog 2001-config reserved word not implemented: 'cell'
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15 | cell rtlLib.cell;
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| ^~~~
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%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:15:16: Unsupported: Verilog 2001-config reserved word not implemented: 'cell'
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15 | cell rtlLib.cell;
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| ^~~~
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%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:16:1: Unsupported: Verilog 2001-config reserved word not implemented: 'endconfig'
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16 | endconfig
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| ^~~~~~~~~
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%Error: Exiting due to
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