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Tests: Don't expose version numbers

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This commit is contained in:
Wilson Snyder 2021-04-24 10:33:49 -04:00
parent 8749f545b6
commit aedd16225a
181 changed files with 181 additions and 180 deletions
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1
test_regress/driver.pl
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@ -2144,6 +2144,7 @@ sub files_identical {
$l1[$l] =~ s/Command Failed[^\n]+/Command Failed/mig;
$l1[$l] =~ s/Version: Verilator[^\n]+/Version: Verilator ###/mig;
$l1[$l] =~ s/CPU Time: +[0-9.]+ seconds[^\n]+/CPU Time: ###/mig;
$l1[$l] =~ s/\?v=[0-9.]+/?v=latest/mig; # warning URL
if ($l1[$l] =~ s/Exiting due to.*/Exiting due to/mig) {
splice @l1, $l+1; # Trunc rest
last;

2
test_regress/t/t_alias2_unsup.out
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@ -1,5 +1,5 @@
%Error-UNSUPPORTED: t/t_alias2_unsup.v:39:4: Unsupported: alias statements
39 | alias b = {a[3:0],a[7:4]};
| ^~~~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: Exiting due to

2
test_regress/t/t_alias_unsup.out
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@ -1,5 +1,5 @@
%Error-UNSUPPORTED: t/t_alias_unsup.v:46:4: Unsupported: alias statements
46 | alias {a[7:0],a[15:8],a[23:16],a[31:24]} = b;
| ^~~~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: Exiting due to

2
test_regress/t/t_array_list_bad.out
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@ -6,6 +6,6 @@
: ... In instance t
38 | test_out <= '{'0, '0};
| ^~
... For warning description see https://verilator.org/warn/WIDTH?v=4.201
... For warning description see https://verilator.org/warn/WIDTH?v=latest
... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.
%Error: Exiting due to

2
test_regress/t/t_assert_comp_bad.out
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@ -10,7 +10,7 @@
: ... In instance t
12 | $warning;
| ^~~~~~~~
... For warning description see https://verilator.org/warn/USERWARN?v=4.201
... For warning description see https://verilator.org/warn/USERWARN?v=latest
... Use "/* verilator lint_off USERWARN */" and lint_on around source to disable this message.
%Warning-USERWARN: t/t_assert_comp_bad.v:13:7: User elaboration-time warning
: ... In instance t

2
test_regress/t/t_assoc_wildcard_unsup.out
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@ -1,5 +1,5 @@
%Error-UNSUPPORTED: t/t_assoc_wildcard_unsup.v:25:19: Unsupported: [*] wildcard associative arrays
25 | string a [*];
| ^~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: Exiting due to

2
test_regress/t/t_case_x_bad.out
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@ -1,7 +1,7 @@
%Warning-CASEX: t/t_case_x_bad.v:14:7: Suggest casez (with ?'s) in place of casex (with X's)
14 | casex (value)
| ^~~~~
... For warning description see https://verilator.org/warn/CASEX?v=4.201
... For warning description see https://verilator.org/warn/CASEX?v=latest
... Use "/* verilator lint_off CASEX */" and lint_on around source to disable this message.
%Warning-CASEWITHX: t/t_case_x_bad.v:19:9: Use of x/? constant in case statement, (perhaps intended casex/casez)
19 | 4'b1xxx: $stop;

2
test_regress/t/t_case_zx_bad.out
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@ -1,6 +1,6 @@
%Warning-CASEWITHX: t/t_case_zx_bad.v:16:9: Use of x constant in casez statement, (perhaps intended ?/z in constant)
16 | 4'b1xxx: $stop;
| ^~~~~~~
... For warning description see https://verilator.org/warn/CASEWITHX?v=4.201
... For warning description see https://verilator.org/warn/CASEWITHX?v=latest
... Use "/* verilator lint_off CASEWITHX */" and lint_on around source to disable this message.
%Error: Exiting due to

2
test_regress/t/t_castdyn_castconst_bad.out
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@ -3,7 +3,7 @@
: ... Suggest static cast
20 | i = $cast(v, 1);
| ^~~~~
... For warning description see https://verilator.org/warn/CASTCONST?v=4.201
... For warning description see https://verilator.org/warn/CASTCONST?v=latest
... Use "/* verilator lint_off CASTCONST */" and lint_on around source to disable this message.
%Warning-CASTCONST: t/t_castdyn_castconst_bad.v:21:11: $cast will always return one as 'CLASSREFDTYPE 'Base'' is always castable from 'CLASSREFDTYPE 'Base''
: ... In instance t

2
test_regress/t/t_castdyn_unsup_bad.out
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@ -3,5 +3,5 @@
: ... Suggest try static cast
13 | $cast(q, aarray);
| ^~~~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: Exiting due to

2
test_regress/t/t_cdc_async_bad.out
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@ -1,7 +1,7 @@
%Warning-CDCRSTLOGIC: t/t_cdc_async_bad.v:28:21: Logic in path that feeds async reset, via signal: 't.rst2_bad_n'
28 | wire rst2_bad_n = rst0_n | rst1_n;
| ^
... For warning description see https://verilator.org/warn/CDCRSTLOGIC?v=4.201
... For warning description see https://verilator.org/warn/CDCRSTLOGIC?v=latest
... Use "/* verilator lint_off CDCRSTLOGIC */" and lint_on around source to disable this message.
%Warning-CDCRSTLOGIC: See details in obj_vlt/t_cdc_async_bad/Vt_cdc_async_bad__cdc.txt
%Warning-CDCRSTLOGIC: t/t_cdc_async_bad.v:53:21: Logic in path that feeds async reset, via signal: 't.rst6a_bad_n'

2
test_regress/t/t_class_class.out
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@ -1,5 +1,5 @@
%Error-UNSUPPORTED: t/t_class_class.v:12:4: Unsupported: class within class
12 | class SubCls;
| ^~~~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: Exiting due to

2
test_regress/t/t_class_extends_bad.out
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@ -1,5 +1,5 @@
%Error-UNSUPPORTED: t/t_class_extends_bad.v:13:26: Multiple inheritance illegal on non-interface classes (IEEE 1800-2017 8.13), and unsupported for interface classes.
13 | class Cls extends Base1, Base2;
| ^~~~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: Exiting due to

2
test_regress/t/t_class_local_bad.out
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@ -5,7 +5,7 @@
t/t_class_local_bad.v:71:20: ... Location of definition
15 | local int m_loc = 2;
| ^~~~~
... For error description see https://verilator.org/warn/ENCAPSULATED?v=4.201
... For error description see https://verilator.org/warn/ENCAPSULATED?v=latest
%Error-ENCAPSULATED: t/t_class_local_bad.v:72:20: 'm_prot' is hidden as 'protected' within this context (IEEE 1800-2017 8.18)
: ... In instance t
72 | bad(); if (c.m_prot != 20) $stop;

2
test_regress/t/t_class_member_bad.out
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@ -7,6 +7,6 @@
: ... In instance t
18 | c.memb3 = 3;
| ^
... For warning description see https://verilator.org/warn/WIDTH?v=4.201
... For warning description see https://verilator.org/warn/WIDTH?v=latest
... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.
%Error: Exiting due to

2
test_regress/t/t_class_param.out
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@ -2,7 +2,7 @@
: ... In instance t
9 | class Cls #(parameter P = 12);
| ^
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error-UNSUPPORTED: t/t_class_param.v:20:11: Unsupported: parameterized classes
: ... In instance t
20 | Cls #(.P(4)) c4;

2
test_regress/t/t_class_param_bad.out
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@ -2,7 +2,7 @@
: ... Suggested alternative: 'PARAMB'
12 | Cls #(.PARAMBAD(1)) c;
| ^~~~~~~~
... For error description see https://verilator.org/warn/PINNOTFOUND?v=4.201
... For error description see https://verilator.org/warn/PINNOTFOUND?v=latest
%Error-PINNOTFOUND: t/t_class_param_bad.v:13:14: Parameter pin not found: '__paramNumber2'
13 | Cls #(13, 1) cd;
| ^

2
test_regress/t/t_class_static.out
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@ -2,7 +2,7 @@
: ... In instance t
12 | static int c_st = 2;
| ^~~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error-UNSUPPORTED: t/t_class_static.v:25:18: Unsupported: 'static' function/task variables
: ... In instance t
25 | static int st = 2; st++; return st;

2
test_regress/t/t_class_static_order.out
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@ -2,7 +2,7 @@
: ... In instance t
23 | static ClsZ z = new;
| ^
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error-UNSUPPORTED: t/t_class_static_order.v:34:16: Unsupported: 'static' class members
: ... In instance t
34 | static ClsA a = new;

2
test_regress/t/t_class_unsup_bad.out
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@ -1,7 +1,7 @@
%Error-UNSUPPORTED: t/t_class_unsup_bad.v:7:1: Unsupported: virtual interface
7 | virtual interface vi_t vi;
| ^~~~~~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error-UNSUPPORTED: t/t_class_unsup_bad.v:8:1: Unsupported: virtual data type
8 | virtual vi_t vi2;
| ^~~~~~~

2
test_regress/t/t_class_vparam.out
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@ -2,7 +2,7 @@
: ... In instance t
11 | typedef paramed_class_t#(real, 1) paramed_class_double_t;
| ^~~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error-UNSUPPORTED: t/t_class_vparam.v:13:56: Unsupported: class parameters
: ... In instance t
13 | virtual class vclass #(type CTYPE_t = arg_class_t, int I = 0);

2
test_regress/t/t_clk_first_bad.out
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@ -1,6 +1,6 @@
%Warning-DEPRECATED: t/t_clk_first_deprecated.v:12:14: sc_clock is ignored
12 | input clk /*verilator sc_clock*/ ;
| ^~~~~~~~~~~~~~~~~~~~~~
... For warning description see https://verilator.org/warn/DEPRECATED?v=4.201
... For warning description see https://verilator.org/warn/DEPRECATED?v=latest
... Use "/* verilator lint_off DEPRECATED */" and lint_on around source to disable this message.
%Error: Exiting due to

2
test_regress/t/t_clk_scope_bad.out
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@ -2,6 +2,6 @@
: ... In instance t.p2
36 | q <= d;
| ^
... For warning description see https://verilator.org/warn/CLKDATA?v=4.201
... For warning description see https://verilator.org/warn/CLKDATA?v=latest
... Use "/* verilator lint_off CLKDATA */" and lint_on around source to disable this message.
%Error: Exiting due to

2
test_regress/t/t_clocker_bad.out
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@ -1,7 +1,7 @@
%Warning-CLKDATA: t/t_clocker.v:45:17: Clock is assigned to part of data signal 'res8'
45 | assign res8 = {clk_3, 1'b0, clk_4};
| ^
... For warning description see https://verilator.org/warn/CLKDATA?v=4.201
... For warning description see https://verilator.org/warn/CLKDATA?v=latest
... Use "/* verilator lint_off CLKDATA */" and lint_on around source to disable this message.
%Warning-CLKDATA: t/t_clocker.v:46:17: Clock is assigned to part of data signal 'res16'
46 | assign res16 = {count, clk_3, clk_1, clk_4};

2
test_regress/t/t_concat_large_bad.out
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@ -2,6 +2,6 @@
: ... In instance t
9 | wire [32767:0] a = {32768{1'b1}};
| ^
... For warning description see https://verilator.org/warn/WIDTHCONCAT?v=4.201
... For warning description see https://verilator.org/warn/WIDTHCONCAT?v=latest
... Use "/* verilator lint_off WIDTHCONCAT */" and lint_on around source to disable this message.
%Error: Exiting due to

2
test_regress/t/t_concat_link_bad.out
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@ -10,6 +10,6 @@
%Warning-IMPLICIT: t/t_concat_link_bad.v:13:12: Signal definition not found, creating implicitly: 'bar_s'
13 | assign bar_s = {foo_s, foo_s}.f1;
| ^~~~~
... For warning description see https://verilator.org/warn/IMPLICIT?v=4.201
... For warning description see https://verilator.org/warn/IMPLICIT?v=latest
... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.
%Error: Exiting due to

2
test_regress/t/t_const_bad.out
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@ -2,7 +2,7 @@
: ... In instance t
13 | if (68'hx_xxxxxxxx_xxxxxxxx !== 'dX) $stop;
| ^~~
... For warning description see https://verilator.org/warn/WIDTH?v=4.201
... For warning description see https://verilator.org/warn/WIDTH?v=latest
... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.
%Warning-WIDTH: t/t_const_bad.v:14:39: Unsized constant being X/Z extended to 68 bits: ?32?bzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz
: ... In instance t

2
test_regress/t/t_delay_stmtdly_bad.out
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@ -1,7 +1,7 @@
%Warning-ASSIGNDLY: t/t_delay.v:22:13: Unsupported: Ignoring delay on this assignment/primitive.
22 | assign #(1.2000000000000000) dly1 = dly0 + 32'h1;
| ^~~~~~~~~~~~~~~~~~
... For warning description see https://verilator.org/warn/ASSIGNDLY?v=4.201
... For warning description see https://verilator.org/warn/ASSIGNDLY?v=latest
... Use "/* verilator lint_off ASSIGNDLY */" and lint_on around source to disable this message.
%Warning-ASSIGNDLY: t/t_delay.v:27:19: Unsupported: Ignoring delay on this assignment/primitive.
27 | dly0 <= #0 32'h11;

2
test_regress/t/t_dpi_unpack_bad.out
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@ -2,7 +2,7 @@
: ... In instance t
21 | import_func0(sig0);
| ^~~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Warning-WIDTH: t/t_dpi_unpack_bad.v:21:7: Operator TASKREF 'import_func0' expects 4 bits on the Function Argument, but Function Argument's VARREF 'sig0' generates 3 bits.
: ... In instance t
21 | import_func0(sig0);

2
test_regress/t/t_dynarray_bad.out
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@ -2,7 +2,7 @@
: ... In instance t
15 | a = new [s];
| ^~~
... For warning description see https://verilator.org/warn/WIDTH?v=4.201
... For warning description see https://verilator.org/warn/WIDTH?v=latest
... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.
%Error: Internal Error: t/t_dynarray_bad.v:15:16: ../V3Number.cpp:#: Number operation called with non-logic (double or string) argument: '"str""
15 | a = new [s];

2
test_regress/t/t_enum_bad_hide.out
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@ -4,6 +4,6 @@
t/t_enum_bad_hide.v:7:16: ... Location of original declaration
11 | typedef enum { HIDE_VALUE = 0 } hide_enum_t;
| ^~~~~~~~~~
... For warning description see https://verilator.org/warn/VARHIDDEN?v=4.201
... For warning description see https://verilator.org/warn/VARHIDDEN?v=latest
... Use "/* verilator lint_off VARHIDDEN */" and lint_on around source to disable this message.
%Error: Exiting due to

2
test_regress/t/t_event_control_unsup.out
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@ -3,7 +3,7 @@
: ... Suggest have one timing control statement per procedure, at the top of the procedure
14 | @(clk);
| ^
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error-UNSUPPORTED: t/t_event_control_unsup.v:16:7: Unsupported: timing control statement in this location
: ... In instance t
: ... Suggest have one timing control statement per procedure, at the top of the procedure

2
test_regress/t/t_event_copy.out
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@ -2,7 +2,7 @@
: ... In instance t
100 | e4 = e3;
| ^
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error-UNSUPPORTED: t/t_event_copy.v:101:13: Unsupported: assignment of event data type
: ... In instance t
101 | e3 = e2;

2
test_regress/t/t_flag_context_bad.out
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@ -1,6 +1,6 @@
%Warning-WIDTH: t/t_flag_context_bad.v:9:19: Operator ASSIGNW expects 3 bits on the Assign RHS, but Assign RHS's CONST '5'h1f' generates 5 bits.
: ... In instance t
... For warning description see https://verilator.org/warn/WIDTH?v=4.201
... For warning description see https://verilator.org/warn/WIDTH?v=latest
... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.
%Warning-UNUSED: t/t_flag_context_bad.v:9:15: Signal is not used: 'foo'
: ... In instance t

2
test_regress/t/t_flag_main_sc_bad.out
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@ -1,3 +1,3 @@
%Error-UNSUPPORTED: --main not usable with SystemC. Suggest see examples for sc_main().
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: Exiting due to

2
test_regress/t/t_flag_topmodule_bad.out
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@ -1,6 +1,6 @@
%Warning-MULTITOP: t/t_flag_topmodule.v:15:8: Multiple top level modules
: ... Suggest see manual; fix the duplicates, or use --top-module to select top.
... For warning description see https://verilator.org/warn/MULTITOP?v=4.201
... For warning description see https://verilator.org/warn/MULTITOP?v=latest
... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.
: ... Top module 'a'
7 | module a;

2
test_regress/t/t_flag_werror_bad1.out
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@ -2,6 +2,6 @@
: ... In instance t
10 | wire [3:0] foo = 6'h2e;
| ^
... For warning description see https://verilator.org/warn/WIDTH?v=4.201
... For warning description see https://verilator.org/warn/WIDTH?v=latest
... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.
%Error: Exiting due to

2
test_regress/t/t_flag_werror_bad2.out
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@ -2,5 +2,5 @@
: ... In instance t
10 | wire [3:0] foo = 6'h2e;
| ^
... For error description see https://verilator.org/warn/WIDTH?v=4.201
... For error description see https://verilator.org/warn/WIDTH?v=latest
%Error: Exiting due to

2
test_regress/t/t_flag_wfatal.out
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@ -2,5 +2,5 @@
: ... In instance t
10 | wire [3:0] foo = 6'h2e;
| ^
... For warning description see https://verilator.org/warn/WIDTH?v=4.201
... For warning description see https://verilator.org/warn/WIDTH?v=latest
... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.

2
test_regress/t/t_for_comma_bad.out
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@ -1,7 +1,7 @@
%Error-UNSUPPORTED: t/t_for_comma_bad.v:27:23: Unsupported: for loop initialization after the first comma
27 | for (integer a=0, integer b=0; a<1; ) ;
| ^
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error-UNSUPPORTED: t/t_for_comma_bad.v:28:23: Unsupported: for loop initialization after the first comma
28 | for (integer a=0, integer b=0; a<1; a=a+1) ;
| ^

2
test_regress/t/t_fork.out
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@ -2,5 +2,5 @@
: ... In instance t
10 | fork : fblk
| ^~~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: Exiting due to

2
test_regress/t/t_fork_disable.out
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@ -2,7 +2,7 @@
: ... In instance t
12 | fork
| ^~~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error-UNSUPPORTED: t/t_fork_disable.v:16:7: Unsupported: disable fork statements
: ... In instance t
16 | disable fork;

2
test_regress/t/t_func_bad.out
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@ -14,7 +14,7 @@
: ... In instance t
11 | x;
| ^
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: t/t_func_bad.v:14:17: No such argument 'no_such' in function call to FUNC 'f'
: ... In instance t
14 | f(.j(1), .no_such(2));

2
test_regress/t/t_func_bad2.out
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@ -2,5 +2,5 @@
: ... In instance t
8 | function recurse;
| ^~~~~~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: Exiting due to

2
test_regress/t/t_func_bad_width.out
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@ -2,7 +2,7 @@
: ... In instance t
13 | out = MUX (in);
| ^~~
... For warning description see https://verilator.org/warn/WIDTH?v=4.201
... For warning description see https://verilator.org/warn/WIDTH?v=latest
... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.
%Warning-WIDTH: t/t_func_bad_width.v:13:11: Operator ASSIGN expects 4 bits on the Assign RHS, but Assign RHS's FUNCREF 'MUX' generates 32 bits.
: ... In instance t

2
test_regress/t/t_func_const2_bad.out
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@ -1,5 +1,5 @@
%Warning-USERFATAL: "f_add = 15"
... For warning description see https://verilator.org/warn/USERFATAL?v=4.201
... For warning description see https://verilator.org/warn/USERFATAL?v=latest
... Use "/* verilator lint_off USERFATAL */" and lint_on around source to disable this message.
%Error: t/t_func_const2_bad.v:22:23: Expecting expression to be constant, but can't determine constant for FUNCREF 'f_add2'
: ... In instance t.b8_a7.c9

2
test_regress/t/t_func_const3_bad.out
View File

@ -2,6 +2,6 @@
: ... In instance t.b9k.c9
12 | localparam SOMEP = {BITS{1'b0}};
| ^
... For warning description see https://verilator.org/warn/WIDTHCONCAT?v=4.201
... For warning description see https://verilator.org/warn/WIDTHCONCAT?v=latest
... Use "/* verilator lint_off WIDTHCONCAT */" and lint_on around source to disable this message.
%Error: Exiting due to

2
test_regress/t/t_func_const_bad.out
View File

@ -35,7 +35,7 @@
-Info: "Printing in loop: 1"
-Info: "Printing in loop: 2"
%Warning-USERFATAL: "Fatal Error"
... For warning description see https://verilator.org/warn/USERFATAL?v=4.201
... For warning description see https://verilator.org/warn/USERFATAL?v=latest
... Use "/* verilator lint_off USERFATAL */" and lint_on around source to disable this message.
%Error: t/t_func_const_bad.v:50:24: Expecting expression to be constant, but can't determine constant for FUNCREF 'f_bad_fatal'
: ... In instance t

2
test_regress/t/t_func_const_packed_array_bad.out
View File

@ -1,5 +1,5 @@
%Warning-USERFATAL: "f_add = 15"
... For warning description see https://verilator.org/warn/USERFATAL?v=4.201
... For warning description see https://verilator.org/warn/USERFATAL?v=latest
... Use "/* verilator lint_off USERFATAL */" and lint_on around source to disable this message.
%Error: t/t_func_const_packed_array_bad.v:12:21: Expecting expression to be constant, but can't determine constant for FUNCREF 'f_add2'
: ... In instance t

2
test_regress/t/t_func_const_packed_struct_bad.out
View File

@ -1,5 +1,5 @@
%Warning-USERFATAL: "f_add = 15"
... For warning description see https://verilator.org/warn/USERFATAL?v=4.201
... For warning description see https://verilator.org/warn/USERFATAL?v=latest
... Use "/* verilator lint_off USERFATAL */" and lint_on around source to disable this message.
%Error: t/t_func_const_packed_struct_bad.v:14:21: Expecting expression to be constant, but can't determine constant for FUNCREF 'f_add2'
: ... In instance t

2
test_regress/t/t_func_const_packed_struct_bad2.out
View File

@ -1,5 +1,5 @@
%Warning-USERFATAL: "f_add = 15"
... For warning description see https://verilator.org/warn/USERFATAL?v=4.201
... For warning description see https://verilator.org/warn/USERFATAL?v=latest
... Use "/* verilator lint_off USERFATAL */" and lint_on around source to disable this message.
%Error: t/t_func_const_packed_struct_bad2.v:20:21: Expecting expression to be constant, but can't determine constant for FUNCREF 'f_add2'
: ... In instance t

2
test_regress/t/t_func_const_struct_bad.out
View File

@ -1,5 +1,5 @@
%Warning-USERFATAL: "f_add = 15"
... For warning description see https://verilator.org/warn/USERFATAL?v=4.201
... For warning description see https://verilator.org/warn/USERFATAL?v=latest
... Use "/* verilator lint_off USERFATAL */" and lint_on around source to disable this message.
%Error: t/t_func_const_struct_bad.v:17:21: Expecting expression to be constant, but can't determine constant for FUNCREF 'f_add2'
: ... In instance t

2
test_regress/t/t_func_impure_bad.out
View File

@ -4,5 +4,5 @@
t/t_func_impure_bad.v:13:7: ... Location of the external reference: 't.sig'
13 | sig = '1;
| ^~~
... For error description see https://verilator.org/warn/IMPURE?v=4.201
... For error description see https://verilator.org/warn/IMPURE?v=latest
%Error: Exiting due to

2
test_regress/t/t_func_tasknsvar_bad.out
View File

@ -1,7 +1,7 @@
%Error-TASKNSVAR: t/t_func_tasknsvar_bad.v:16:29: Unsupported: Function/task input argument is not simple variable
16 | foo(bus_we_select_from[2]);
| ^
... For error description see https://verilator.org/warn/TASKNSVAR?v=4.201
... For error description see https://verilator.org/warn/TASKNSVAR?v=latest
%Error: Internal Error: t/t_func_tasknsvar_bad.v:10:7: ../V3Broken.cpp:#: Broken link in node (or something without maybePointedTo): m_varScopep && !m_varScopep->brokeExists()
10 | sig = '1;
| ^~~

2
test_regress/t/t_func_void_bad.out
View File

@ -1,6 +1,6 @@
%Warning-IGNOREDRETURN: t/t_func_void_bad.v:26:7: Ignoring return value of non-void function (IEEE 1800-2017 13.4.1)
26 | f1(20);
| ^~
... For warning description see https://verilator.org/warn/IGNOREDRETURN?v=4.201
... For warning description see https://verilator.org/warn/IGNOREDRETURN?v=latest
... Use "/* verilator lint_off IGNOREDRETURN */" and lint_on around source to disable this message.
%Error: Exiting due to

2
test_regress/t/t_func_wide_out_bad.out
View File

@ -2,5 +2,5 @@
: ... In instance t
17 | func(msg);
| ^~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: Exiting due to

2
test_regress/t/t_fuzz_always_bad.out
View File

@ -7,5 +7,5 @@
%Error-UNSUPPORTED: t/t_fuzz_always_bad.v:10:14: Unsupported: Complex statement in sensitivity list
10 | always @ c.a c:h;
| ^
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: Exiting due to

2
test_regress/t/t_fuzz_genintf_bad.out
View File

@ -2,7 +2,7 @@
: ... In instance t
24 | j.e(0),
| ^
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: Internal Error: t/t_fuzz_genintf_bad.v:24:11: ../V3Width.cpp:#: Unlinked pin data type
: ... In instance t
24 | j.e(0),

2
test_regress/t/t_fuzz_triand_bad.out
View File

@ -2,7 +2,7 @@
: ... In instance t
8 | tri g=g.and.g;
| ^~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: Internal Error: t/t_fuzz_triand_bad.v:8:12: ../V3Width.cpp:#: Unlinked data type
: ... In instance t
8 | tri g=g.and.g;

2
test_regress/t/t_gen_cond_bitrange_bad.out
View File

@ -2,7 +2,7 @@
: ... In instance t.i_test_gen
58 | if ((g < (SIZE + 1)) && MASK[g]) begin
| ^
... For warning description see https://verilator.org/warn/SELRANGE?v=4.201
... For warning description see https://verilator.org/warn/SELRANGE?v=latest
... Use "/* verilator lint_off SELRANGE */" and lint_on around source to disable this message.
%Warning-SELRANGE: t/t_gen_cond_bitrange_bad.v:70:32: Selection index out of range: 2:2 outside 1:0
: ... In instance t.i_test_gen

2
test_regress/t/t_gen_defparam_unsup_bad.out
View File

@ -1,7 +1,7 @@
%Error-UNSUPPORTED: t/t_gen_defparam_unsup_bad.v:9:16: Unsupported: defparam with more than one dot
9 | defparam a.b.W = 3;
| ^
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: t/t_gen_defparam_unsup_bad.v:9:17: syntax error, unexpected IDENTIFIER, expecting ',' or ';'
9 | defparam a.b.W = 3;
| ^

2
test_regress/t/t_generate_fatal_bad.out
View File

@ -1,5 +1,5 @@
%Warning-USERFATAL: "boom"
... For warning description see https://verilator.org/warn/USERFATAL?v=4.201
... For warning description see https://verilator.org/warn/USERFATAL?v=latest
... Use "/* verilator lint_off USERFATAL */" and lint_on around source to disable this message.
%Error: t/t_generate_fatal_bad.v:13:29: Expecting expression to be constant, but can't determine constant for FUNCREF 'get_baz'
: ... In instance t.nested_loop[10].foo2_inst.foo2_loop[1].foo_in_foo2_inst

2
test_regress/t/t_hier_block1_bad.out
View File

@ -3,7 +3,7 @@
... Suggest remove verilator hier_block on this module
15 | module t (
| ^
... For warning description see https://verilator.org/warn/HIERBLOCK?v=4.201
... For warning description see https://verilator.org/warn/HIERBLOCK?v=latest
... Use "/* verilator lint_off HIERBLOCK */" and lint_on around source to disable this message.
%Error: t/t_hier_block1_bad.v:44:32: Modport cannot be used at the hierarchical block boundary
: ... In instance t.i_sub1

2
test_regress/t/t_hierarchy_identifier_bad.out
View File

@ -1,7 +1,7 @@
%Warning-ENDLABEL: t/t_hierarchy_identifier_bad.v:34:10: End label 'if_cnt_finish_bad' does not match begin label 'if_cnt_finish'
34 | end : if_cnt_finish_bad
| ^~~~~~~~~~~~~~~~~
... For warning description see https://verilator.org/warn/ENDLABEL?v=4.201
... For warning description see https://verilator.org/warn/ENDLABEL?v=latest
... Use "/* verilator lint_off ENDLABEL */" and lint_on around source to disable this message.
%Warning-ENDLABEL: t/t_hierarchy_identifier_bad.v:40:10: End label 'generate_for_bad' does not match begin label 'generate_for'
40 | end : generate_for_bad

2
test_regress/t/t_increment_bad.out
View File

@ -1,7 +1,7 @@
%Error-UNSUPPORTED: t/t_increment_bad.v:15:31: Unsupported: Incrementation in this context.
15 | if (0 && test_string[pos++] != "e");
| ^~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error-UNSUPPORTED: t/t_increment_bad.v:16:19: Unsupported: Incrementation in this context.
16 | if (1 || pos-- != 1);
| ^~

2
test_regress/t/t_initial_dlyass_bad.out
View File

@ -2,7 +2,7 @@
: ... Suggest blocking assignments (=)
18 | a <= 22;
| ^~
... For warning description see https://verilator.org/warn/INITIALDLY?v=4.201
... For warning description see https://verilator.org/warn/INITIALDLY?v=latest
... Use "/* verilator lint_off INITIALDLY */" and lint_on around source to disable this message.
%Warning-INITIALDLY: t/t_initial_dlyass.v:19:9: Delayed assignments (<=) in initial or final block
: ... Suggest blocking assignments (=)

2
test_regress/t/t_inst_missing_bad.out
View File

@ -1,7 +1,7 @@
%Warning-PINNOCONNECT: t/t_inst_missing_bad.v:9:22: Cell pin is not connected: '__pinNumber2'
9 | sub sub (.ok(ok), , .nc());
| ^
... For warning description see https://verilator.org/warn/PINNOCONNECT?v=4.201
... For warning description see https://verilator.org/warn/PINNOCONNECT?v=latest
... Use "/* verilator lint_off PINNOCONNECT */" and lint_on around source to disable this message.
%Warning-PINCONNECTEMPTY: t/t_inst_missing_bad.v:9:25: Cell pin connected by name with empty reference: 'nc'
9 | sub sub (.ok(ok), , .nc());

2
test_regress/t/t_inst_overwide_bad.out
View File

@ -2,7 +2,7 @@
: ... In instance t
23 | .outy_w92 (outc_w30),
| ^~~~~~~~
... For warning description see https://verilator.org/warn/WIDTH?v=4.201
... For warning description see https://verilator.org/warn/WIDTH?v=latest
... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.
%Warning-WIDTH: t/t_inst_overwide.v:24:14: Output port connection 'outz_w22' expects 22 bits on the pin connection, but pin connection's VARREF 'outd_w73' generates 73 bits.
: ... In instance t

2
test_regress/t/t_inst_pin_realnreal.out
View File

@ -2,5 +2,5 @@
: ... In instance t.netlist
51 | pga_model pga0(.in, .gain, .out(pga_out));
| ^~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: Exiting due to

2
test_regress/t/t_inst_recurse2_bad.out
View File

@ -2,5 +2,5 @@
: ... In instance t.looped.looped
18 | module looped ( );
| ^~~~~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: Exiting due to

2
test_regress/t/t_inst_recurse_bad.out
View File

@ -2,5 +2,5 @@
... note: self-recursion (module instantiating itself directly) is supported.
18 | module looped ( );
| ^~~~~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: Exiting due to

2
test_regress/t/t_interface_array_nocolon_bad.out
View File

@ -2,7 +2,7 @@
: ... In instance t
26 | foo_intf foos [N] (.x(X));
| ^
... For warning description see https://verilator.org/warn/LITENDIAN?v=4.201
... For warning description see https://verilator.org/warn/LITENDIAN?v=latest
... Use "/* verilator lint_off LITENDIAN */" and lint_on around source to disable this message.
%Warning-LITENDIAN: t/t_interface_array_nocolon_bad.v:27:28: Little endian instance range connecting to vector: left < right of instance range: [1:3]
: ... In instance t

2
test_regress/t/t_interface_top_bad.out
View File

@ -1,7 +1,7 @@
%Error-UNSUPPORTED: t/t_interface_top_bad.v:17:19: Unsupported: Interfaced port on top level module
17 | ifc.counter_mp c_data
| ^~~~~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: t/t_interface_top_bad.v:17:4: Parent instance's interface is not found: 'ifc'
17 | ifc.counter_mp c_data
| ^~~

2
test_regress/t/t_interface_typedef.out
View File

@ -1,7 +1,7 @@
%Error-UNSUPPORTED: t/t_interface_typedef.v:46:4: Unsupported: SystemVerilog 2005 typedef in this context
46 | typedef ifc_if.struct_t struct_t;
| ^~~~~~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: t/t_interface_typedef.v:51:16: syntax error, unexpected IDENTIFIER
51 | struct_t substruct;
| ^~~~~~~~~

2
test_regress/t/t_lint_always_comb_bad.out
View File

@ -2,7 +2,7 @@
: ... In instance t
29 | temp1 = 'h0;
| ^~~~~
... For error description see https://verilator.org/warn/PROCASSWIRE?v=4.201
... For error description see https://verilator.org/warn/PROCASSWIRE?v=latest
%Error-PROCASSWIRE: t/t_lint_always_comb_bad.v:31:9: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'temp1'
: ... In instance t
31 | temp1 = (temp1_d1r - 'h1);

2
test_regress/t/t_lint_blksync_bad.out
View File

@ -2,7 +2,7 @@
: ... Suggest delayed assignments (<=)
24 | sync_blk = 1'b1;
| ^
... For warning description see https://verilator.org/warn/BLKSEQ?v=4.201
... For warning description see https://verilator.org/warn/BLKSEQ?v=latest
... Use "/* verilator lint_off BLKSEQ */" and lint_on around source to disable this message.
%Warning-COMBDLY: t/t_lint_blksync_bad.v:31:18: Delayed assignments (<=) in non-clocked (non flop or latch) block
: ... Suggest blocking assignments (=)

2
test_regress/t/t_lint_bsspace_bad.out
View File

@ -1,7 +1,7 @@
%Warning-BSSPACE: t/t_lint_bsspace_bad.v:10:21: Backslash followed by whitespace, perhaps the whitespace is accidental?
10 | `define FOO blak \
| ^
... For warning description see https://verilator.org/warn/BSSPACE?v=4.201
... For warning description see https://verilator.org/warn/BSSPACE?v=latest
... Use "/* verilator lint_off BSSPACE */" and lint_on around source to disable this message.
%Error: t/t_lint_bsspace_bad.v:11:4: syntax error, unexpected IDENTIFIER
11 | blak

2
test_regress/t/t_lint_caseincomplete_bad.out
View File

@ -1,6 +1,6 @@
%Warning-CASEINCOMPLETE: t/t_lint_caseincomplete_bad.v:15:7: Case values incompletely covered (example pattern 0x1)
15 | case (i)
| ^~~~
... For warning description see https://verilator.org/warn/CASEINCOMPLETE?v=4.201
... For warning description see https://verilator.org/warn/CASEINCOMPLETE?v=latest
... Use "/* verilator lint_off CASEINCOMPLETE */" and lint_on around source to disable this message.
%Error: Exiting due to

2
test_regress/t/t_lint_cmpconst_bad.out
View File

@ -2,6 +2,6 @@
: ... In instance t
13 | if (uns > 3'b111) $stop;
| ^
... For warning description see https://verilator.org/warn/CMPCONST?v=4.201
... For warning description see https://verilator.org/warn/CMPCONST?v=latest
... Use "/* verilator lint_off CMPCONST */" and lint_on around source to disable this message.
%Error: Exiting due to

2
test_regress/t/t_lint_colonplus_bad.out
View File

@ -1,6 +1,6 @@
%Warning-COLONPLUS: t/t_lint_colonplus_bad.v:13:25: Perhaps instead of ':+' the intent was '+:'?
13 | output [2:1] z = r[2 :+ 1];
| ^~
... For warning description see https://verilator.org/warn/COLONPLUS?v=4.201
... For warning description see https://verilator.org/warn/COLONPLUS?v=latest
... Use "/* verilator lint_off COLONPLUS */" and lint_on around source to disable this message.
%Error: Exiting due to

2
test_regress/t/t_lint_declfilename_bad.out
View File

@ -1,6 +1,6 @@
%Warning-DECLFILENAME: t/t_lint_declfilename.v:7:8: Filename 't_lint_declfilename' does not match MODULE name: 't'
7 | module t;
| ^
... For warning description see https://verilator.org/warn/DECLFILENAME?v=4.201
... For warning description see https://verilator.org/warn/DECLFILENAME?v=latest
... Use "/* verilator lint_off DECLFILENAME */" and lint_on around source to disable this message.
%Error: Exiting due to

2
test_regress/t/t_lint_defparam_bad.out
View File

@ -2,6 +2,6 @@
: ... Suggest use instantiation with #(.P(...etc...))
10 | defparam sub.P = 2;
| ^
... For warning description see https://verilator.org/warn/DEFPARAM?v=4.201
... For warning description see https://verilator.org/warn/DEFPARAM?v=latest
... Use "/* verilator lint_off DEFPARAM */" and lint_on around source to disable this message.
%Error: Exiting due to

2
test_regress/t/t_lint_eofline_bad.out
View File

@ -1,6 +1,6 @@
%Warning-EOFNEWLINE: obj_vlt/t_lint_eofline_bad/t_lint_eofline_bad.v:4:10: Missing newline at end of file (POSIX 3.206). : ... Suggest add newline.
4 | endmodule
| ^
... For warning description see https://verilator.org/warn/EOFNEWLINE?v=4.201
... For warning description see https://verilator.org/warn/EOFNEWLINE?v=latest
... Use "/* verilator lint_off EOFNEWLINE */" and lint_on around source to disable this message.
%Error: Exiting due to

2
test_regress/t/t_lint_ifdepth_bad.out
View File

@ -2,6 +2,6 @@
: ... In instance t
22 | else if (value==11) begin end
| ^~
... For warning description see https://verilator.org/warn/IFDEPTH?v=4.201
... For warning description see https://verilator.org/warn/IFDEPTH?v=latest
... Use "/* verilator lint_off IFDEPTH */" and lint_on around source to disable this message.
%Error: Exiting due to

2
test_regress/t/t_lint_implicit_bad.out
View File

@ -1,7 +1,7 @@
%Warning-IMPLICIT: t/t_lint_implicit.v:11:11: Signal definition not found, creating implicitly: 'b'
11 | assign b = 1'b1;
| ^
... For warning description see https://verilator.org/warn/IMPLICIT?v=4.201
... For warning description see https://verilator.org/warn/IMPLICIT?v=latest
... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.
%Warning-IMPLICIT: t/t_lint_implicit.v:13:14: Signal definition not found, creating implicitly: 'nt0'
13 | or OR0 (nt0, a, b);

2
test_regress/t/t_lint_implicit_def_bad.out
View File

@ -1,7 +1,7 @@
%Warning-IMPLICIT: t/t_lint_implicit_def_bad.v:13:11: Signal definition not found, creating implicitly: 'imp_warn'
13 | assign imp_warn = 1'b1;
| ^~~~~~~~
... For warning description see https://verilator.org/warn/IMPLICIT?v=4.201
... For warning description see https://verilator.org/warn/IMPLICIT?v=latest
... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.
%Error: t/t_lint_implicit_def_bad.v:18:11: Signal definition not found, and implicit disabled with `default_nettype: 'imp_err'
18 | assign imp_err = 1'b1;

2
test_regress/t/t_lint_import_name2_bad.out
View File

@ -1,7 +1,7 @@
%Error-PKGNODECL: t/t_lint_import_name2_bad.v:7:8: Package/class 'missing' not found, and needs to be predeclared (IEEE 1800-2017 26.3)
7 | import missing::sigs;
| ^~~~~~~
... For error description see https://verilator.org/warn/PKGNODECL?v=4.201
... For error description see https://verilator.org/warn/PKGNODECL?v=latest
%Error: t/t_lint_import_name2_bad.v:7:8: Importing from missing package 'missing'
7 | import missing::sigs;
| ^~~~~~~

2
test_regress/t/t_lint_importstar_bad.out
View File

@ -1,6 +1,6 @@
%Warning-IMPORTSTAR: t/t_lint_importstar_bad.v:11:12: Import::* in $unit scope may pollute global namespace
11 | import defs::*;
| ^~
... For warning description see https://verilator.org/warn/IMPORTSTAR?v=4.201
... For warning description see https://verilator.org/warn/IMPORTSTAR?v=latest
... Use "/* verilator lint_off IMPORTSTAR */" and lint_on around source to disable this message.
%Error: Exiting due to

2
test_regress/t/t_lint_incabspath_bad.out
View File

@ -1,6 +1,6 @@
%Warning-INCABSPATH: t/t_lint_incabspath.v:7:10: Suggest `include with absolute path be made relative, and use +include: /dev/null
7 | `include "/dev/null"
| ^~~~~~~~~~~
... For warning description see https://verilator.org/warn/INCABSPATH?v=4.201
... For warning description see https://verilator.org/warn/INCABSPATH?v=latest
... Use "/* verilator lint_off INCABSPATH */" and lint_on around source to disable this message.
%Error: Exiting due to

2
test_regress/t/t_lint_infinite.out
View File

@ -2,7 +2,7 @@
: ... In instance t
10 | forever begin end
| ^~~~~~~
... For warning description see https://verilator.org/warn/INFINITELOOP?v=4.201
... For warning description see https://verilator.org/warn/INFINITELOOP?v=latest
... Use "/* verilator lint_off INFINITELOOP */" and lint_on around source to disable this message.
%Warning-INFINITELOOP: t/t_lint_infinite.v:12:7: Infinite loop (condition always true)
: ... In instance t

2
test_regress/t/t_lint_input_eq_bad.out
View File

@ -1,5 +1,5 @@
%Error-UNSUPPORTED: t/t_lint_input_eq_bad.v:10:15: Unsupported: Default value on module input: 'i2'
10 | input wire i2 = i
| ^~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: Exiting due to

2
test_regress/t/t_lint_latch_bad.out
View File

@ -1,7 +1,7 @@
%Warning-NOLATCH: t/t_lint_latch_bad.v:17:4: No latches detected in always_latch block
17 | always_latch begin
| ^~~~~~~~~~~~
... For warning description see https://verilator.org/warn/NOLATCH?v=4.201
... For warning description see https://verilator.org/warn/NOLATCH?v=latest
... Use "/* verilator lint_off NOLATCH */" and lint_on around source to disable this message.
%Warning-COMBDLY: t/t_lint_latch_bad.v:25:10: Delayed assignments (<=) in non-clocked (non flop or latch) block
: ... Suggest blocking assignments (=)

2
test_regress/t/t_lint_latch_bad_2.out
View File

@ -2,6 +2,6 @@
: ... Suggest use of always_latch for intentional latches
11 | always @(a or b)
| ^~~~~~
... For warning description see https://verilator.org/warn/LATCH?v=4.201
... For warning description see https://verilator.org/warn/LATCH?v=latest
... Use "/* verilator lint_off LATCH */" and lint_on around source to disable this message.
%Error: Exiting due to

2
test_regress/t/t_lint_latch_bad_3.out
View File

@ -2,7 +2,7 @@
: ... Suggest use of always_latch for intentional latches
18 | always @(reset or en or a or b)
| ^~~~~~
... For warning description see https://verilator.org/warn/LATCH?v=4.201
... For warning description see https://verilator.org/warn/LATCH?v=latest
... Use "/* verilator lint_off LATCH */" and lint_on around source to disable this message.
%Warning-COMBDLY: t/t_lint_latch_bad_3.v:70:12: Delayed assignments (<=) in non-clocked (non flop or latch) block
: ... Suggest blocking assignments (=)

2
test_regress/t/t_lint_literal_bad.out
View File

@ -1,6 +1,6 @@
%Warning-WIDTH: t/t_lint_literal_bad.v:10:33: Value too large for 8 bit number: 256
10 | localparam the_localparam = 8'd256;
| ^~~~~~
... For warning description see https://verilator.org/warn/WIDTH?v=4.201
... For warning description see https://verilator.org/warn/WIDTH?v=latest
... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.
%Error: Exiting due to

2
test_regress/t/t_lint_multidriven_bad.out
View File

@ -5,7 +5,7 @@
t/t_lint_multidriven_bad.v:24:7: ... Location of other driving block
24 | mem[a0] <= d0;
| ^~~
... For warning description see https://verilator.org/warn/MULTIDRIVEN?v=4.201
... For warning description see https://verilator.org/warn/MULTIDRIVEN?v=latest
... Use "/* verilator lint_off MULTIDRIVEN */" and lint_on around source to disable this message.
%Warning-MULTIDRIVEN: t/t_lint_multidriven_bad.v:19:22: Signal has multiple driving blocks with different clocking: 'out2'
t/t_lint_multidriven_bad.v:35:7: ... Location of first driving block

2
test_regress/t/t_lint_nolatch_bad.out
View File

@ -1,6 +1,6 @@
%Warning-NOLATCH: t/t_lint_nolatch_bad.v:11:4: No latches detected in always_latch block
11 | always_latch @(a or b)
| ^~~~~~~~~~~~
... For warning description see https://verilator.org/warn/NOLATCH?v=4.201
... For warning description see https://verilator.org/warn/NOLATCH?v=latest
... Use "/* verilator lint_off NOLATCH */" and lint_on around source to disable this message.
%Error: Exiting due to

2
test_regress/t/t_lint_nullport.out
View File

@ -1,7 +1,7 @@
%Warning-NULLPORT: t/t_lint_nullport.v:23:13: Null port on module (perhaps extraneous comma)
23 | module t5(a,);
| ^
... For warning description see https://verilator.org/warn/NULLPORT?v=4.201
... For warning description see https://verilator.org/warn/NULLPORT?v=latest
... Use "/* verilator lint_off NULLPORT */" and lint_on around source to disable this message.
%Warning-NULLPORT: t/t_lint_nullport.v:27:13: Null port on module (perhaps extraneous comma)
27 | module t6(a,,);

2
test_regress/t/t_lint_once_bad.out
View File

@ -2,7 +2,7 @@
: ... In instance t.sub3
19 | reg [A:0] unus1; reg [A:0] unus2;
| ^~~~~
... For warning description see https://verilator.org/warn/UNUSED?v=4.201
... For warning description see https://verilator.org/warn/UNUSED?v=latest
... Use "/* verilator lint_off UNUSED */" and lint_on around source to disable this message.
%Warning-UNUSED: t/t_lint_once_bad.v:19:34: Signal is not driven, nor used: 'unus2'
: ... In instance t.sub3

2
test_regress/t/t_lint_pindup_bad.out
View File

@ -1,7 +1,7 @@
%Warning-PINMISSING: t/t_lint_pindup_bad.v:19:4: Cell has missing pin: 'exists'
19 | sub (.o(o),
| ^~~
... For warning description see https://verilator.org/warn/PINMISSING?v=4.201
... For warning description see https://verilator.org/warn/PINMISSING?v=latest
... Use "/* verilator lint_off PINMISSING */" and lint_on around source to disable this message.
%Error: t/t_lint_pindup_bad.v:21:10: Duplicate pin connection: 'i'
21 | .i(i2),

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