Yutetsu TAKATSUKASA 5476ff93e2 Ignore some files generated by modelsim (#2669)		2020-12-05 21:55:56 -05:00
..
t	Internals: Apply verilog-mode. No functional change is intended. (#2671)	2020-12-05 21:55:06 -05:00
.gdbinit
.gitignore	Ignore some files generated by modelsim (#2669)	2020-12-05 21:55:56 -05:00
CMakeLists.txt
driver.pl
input.vc
input.xsim.vc
Makefile
Makefile_obj