Mario1159/verilator
1
0
Fork 0
forked from github/verilator
Code Pull Requests Releases 1 Activity

Internals: Apply verilog-mode. No functional change is intended. (#2671)

Browse Source
This commit is contained in:
Yutetsu TAKATSUKASA 2020-12-06 11:55:06 +09:00 committed by GitHub
parent 9c2785b49b
commit 375ea169b9
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 24 additions and 24 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
test_regress/t/t_prot_lib.v
View File

@ -16,19 +16,19 @@ if (cyc > 0 && sig``_in != sig``_out) begin \
end
module t #(parameter GATED_CLK = 0) (/*AUTOARG*/
// Inputs
clk
);
// Inputs
clk
);
input clk;
localparam last_cyc =
`ifdef TEST_BENCHMARK
`TEST_BENCHMARK;
`TEST_BENCHMARK;
`else
10;
`endif
genvar x;
genvar x;
generate
for (x = 0; x < 2; x = x + 1) begin: gen_loop
integer cyc = 0;

38
test_regress/t/t_prot_lib_secret.v
View File

@ -5,31 +5,31 @@
module secret #(parameter GATED_CLK = 0)
(
input [31:0] accum_in,
output wire [31:0] accum_out,
input accum_bypass,
output [31:0] accum_bypass_out,
input s1_in,
output logic s1_out,
input [1:0] s2_in,
output logic [1:0] s2_out,
input [7:0] s8_in,
output logic [7:0] s8_out,
input [32:0] s33_in,
input [31:0] accum_in,
output wire [31:0] accum_out,
input accum_bypass,
output [31:0] accum_bypass_out,
input s1_in,
output logic s1_out,
input [1:0] s2_in,
output logic [1:0] s2_out,
input [7:0] s8_in,
output logic [7:0] s8_out,
input [32:0] s33_in,
output logic [32:0] s33_out,
input [63:0] s64_in,
input [63:0] s64_in,
output logic [63:0] s64_out,
input [64:0] s65_in,
input [64:0] s65_in,
output logic [64:0] s65_out,
input [128:0] s129_in,
input [128:0] s129_in,
output logic [128:0] s129_out,
input [3:0] [31:0] s4x32_in,
input [3:0] [31:0] s4x32_in,
output logic [3:0] [31:0] s4x32_out,
input clk_en,
input clk /*verilator clocker*/);
input clk_en,
input clk /*verilator clocker*/);
logic [31:0] secret_accum_q = 0;
logic [31:0] secret_value = 7;
logic [31:0] secret_accum_q = 0;
logic [31:0] secret_value = 7;
initial $display("created %m");