forked from github/verilator
15 lines
835 B
Plaintext
15 lines
835 B
Plaintext
%Error-PROCASSWIRE: t/t_wire_behp1800_bad.v:23:7: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'w'
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: ... In instance t
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23 | w = '0;
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| ^
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... For error description see https://verilator.org/warn/PROCASSWIRE?v=latest
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%Error-PROCASSWIRE: t/t_wire_behp1800_bad.v:24:7: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'o'
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: ... In instance t
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24 | o = '0;
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| ^
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%Error-PROCASSWIRE: t/t_wire_behp1800_bad.v:25:7: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'oa'
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: ... In instance t
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25 | oa = '0;
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| ^~
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%Error: Exiting due to
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