forked from github/verilator
18 lines
579 B
Plaintext
18 lines
579 B
Plaintext
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2010 by Wilson Snyder.
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`verilator_config
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lint_off -msg CASEINCOMPLETE -file "t/t_vlt_warn.v"
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lint_off -msg WIDTH -file "t/t_vlt_warn.v" -lines 18
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// Test wildcard filenames
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lint_off -msg WIDTH -file "*/t_vlt_warn.v" -lines 19-19
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// Test global disables
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lint_off -file "*/t_vlt_warn.v" -lines 20-20
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coverage_off -file "t/t_vlt_warn.v"
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// Test --flag is also accepted
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tracing_off --file "t/t_vlt_warn.v"
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