forked from github/verilator
22 lines
437 B
Plaintext
22 lines
437 B
Plaintext
// DESCRIPTION: Verilator: Verilog Test data file
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//
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// Copyright 2006 by Wilson Snyder. This program is free software; you can
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// redistribute it and/or modify it under the terms of either the GNU
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// Lesser General Public License Version 3 or the Perl Artistic License
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// Version 2.0.
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// ** Note this file has DOS CR's so we can test them!
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10000
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10001
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10010
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10011
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/*
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multi line
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ignored
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*/
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10100
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10101
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10110
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10111
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