forked from github/verilator
100 lines
1.1 KiB
Plaintext
100 lines
1.1 KiB
Plaintext
`line 1 "t/t_preproc_psl.v" 1
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`line 4 "t/t_preproc_psl.v" 0
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`line 7 "t/t_preproc_psl.v" 0
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/*verilator metacomment preserved*/
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/*verilator metacomment also_preserved*/
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`line 11 "t/t_preproc_psl.v" 0
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Hello in t_preproc_psl.v
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`line 17 "t/t_preproc_psl.v" 0
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`line 28 "t/t_preproc_psl.v" 0
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`line 28 "t/t_preproc_psl.v" 0
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`line 28 "t/t_preproc_psl.v" 0
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`line 28 "t/t_preproc_psl.v" 0
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`line 28 "t/t_preproc_psl.v" 0
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`line 31 "t/t_preproc_psl.v" 0
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`line 40 "t/t_preproc_psl.v" 0
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`line 40 "t/t_preproc_psl.v" 0
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`line 40 "t/t_preproc_psl.v" 0
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`line 40 "t/t_preproc_psl.v" 0
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`line 40 "t/t_preproc_psl.v" 0
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`line 40 "t/t_preproc_psl.v" 0
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41
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`line 43 "t/t_preproc_psl.v" 0
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`line 45 "t/t_preproc_psl.v" 0
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`line 49 "t/t_preproc_psl.v" 0
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`line 55 "t/t_preproc_psl.v" 0
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`line 57 "t/t_preproc_psl.v" 0
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`line 61 "t/t_preproc_psl.v" 0
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`line 65 "t/t_preproc_psl.v" 0
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`psl
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psl assert always sig!=90;
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`verilog
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`line 71 "t/t_preproc_psl.v" 0
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72
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`line 74 "t/t_preproc_psl.v" 2
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